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// © IBM Corp. 2021
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// Licensed under the Apache License, Version 2.0 (the "License"), as modified by the terms below; you may not use the files in this
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// repository except in compliance with the License as modified.
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// You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0
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//
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// Modified Terms:
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//
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// 1) For the purpose of the patent license granted to you in Section 3 of the License, the "Work" hereby includes implementations of
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// the work of authorship in physical form.
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//
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// Unless required by applicable law or agreed to in writing, the reference design distributed under the License is distributed on an
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// "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language
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// governing permissions and limitations under the License.
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//
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// Brief explanation of modifications:
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//
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// Modification 1: This modification extends the patent license to an implementation of the Work in physical form – i.e.,
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// it unambiguously permits a user to make and use the physical chip.
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// Local Clock Buffer for arrays
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// Generates sim or implementation logic, depending on GENMODE.
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`timescale 1 ns / 1 ns
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/*
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Config_LCB
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31 enable delay
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30 sdr=0 ddr=1
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28:29 tap1 sel (pulse width)
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26:27 tap2 sel (pulse 2 separation gross)
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24:25 tap3 sel (pulse 2 separation fine)
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*/
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module ra_lcb #(
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parameter GENMODE = 0
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) (
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input clk,
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input reset,
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input [0:31] cfg,
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output strobe
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);
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reg no_delay_q;
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reg no_delay_b_q;
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reg ddr_q;
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reg [0:3] tap1_sel_q;
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reg [0:2] tap2_sel_q;
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reg [0:3] tap3_sel_q;
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wire [0:3] delay1;
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wire [0:3] tap1;
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wire tap1_b;
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wire pulse1_b;
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wire delay2_b;
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wire [0:15] delay2;
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wire [0:2] tap2;
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wire tap2_b;
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wire [0:3] delay3;
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wire [0:3] tap3;
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wire pulse2_b;
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wire pulse;
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// predecode and keep locally
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//wtf make these dff cells?
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always @(posedge clk) begin
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no_delay_q <= ~cfg[31];
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no_delay_b_q <= cfg[31];
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ddr_q <= cfg[30];
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tap1_sel_q[0] <= cfg[28:29] == 2'b00;
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tap1_sel_q[1] <= cfg[28:29] == 2'b01;
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tap1_sel_q[2] <= cfg[28:29] == 2'b10;
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tap1_sel_q[3] <= cfg[28:29] == 2'b11;
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tap2_sel_q[0] <= cfg[26:27] == 2'b00;
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tap2_sel_q[1] <= cfg[26:27] == 2'b01;
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tap2_sel_q[2] <= cfg[26:27] == 2'b10;
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//tap2_sel_q[3] <= cfg[26:27] == 2'b11;
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tap3_sel_q[0] <= cfg[24:25] == 2'b00;
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tap3_sel_q[1] <= cfg[24:25] == 2'b01;
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tap3_sel_q[2] <= cfg[24:25] == 2'b10;
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tap3_sel_q[3] <= cfg[24:25] == 2'b11;
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end
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// generate strobe
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// array needs strobe to precharge the bitlines before evaluate phase
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// strobe is AND'd with enable/addr to create precharge signal -> strobe=0 == precharge
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// sdr: one strobe per clk
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// ddr: two strobes per clk; early/late select for addr sel/data out latch
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generate
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if (GENMODE == 0)
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assign strobe = ~clk;
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else begin
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genvar i;
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// dly1 - create pulse 1 (and 2 if ddr) width
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sky130_fd_sc_hd__buf_1 dly1_0(.A(clk), .X(delay1[0]));
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//wtf need to size properly; could spread into 1/2/4/7 etc.
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// there are buf_[1,2,4,6,8,12,16]
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// bufbuf_[8,16]
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// clkbuf_[1,2,4,8,16]
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// clkdlybufs15_[1,2]
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// clkdlybufs18_[1,2]
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// clkdlybufs25_[1,2]
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// blkdlybufs50_[1,2]
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for (i = 1; i < 4; i = i + 1) begin
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sky130_fd_sc_hd__buf_1 dly1_n(.A(delay1[i-1]), .X(delay1[i]));
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end
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for (i = 0; i < 4; i = i + 1) begin
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sky130_fd_sc_hd__and2_1 dly1_sel(.A(tap1_sel_q[i]), .B(delay1[i]), .X(tap1[i]));
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end
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sky130_fd_sc_hd__nor4_1 dly1_or(.A(tap1[0]), .B(tap1[1]), .C(tap1[2]), .D(tap1[3]), .X(tap1_b));
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sky130_fd_sc_hd__nand2_1 dly1_out(.A(clk), .B(tap1_b), .Y(pulse1_b));
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// dly2 - create pulse 2 separation (disable for sdr)
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sky130_fd_sc_hd__and2_1 dly2_in(.A(ddr_q), .B(pulse1_b), .X(delay2_b));
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sky130_fd_sc_hd__inv_1 dly2_0(.A(delay2_b), .Y(delay2[0]));
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// 2-stage
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// +8/12/16
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// +0/1/2/3
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for (i = 1; i < 16; i = i + 1) begin
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sky130_fd_sc_hd__inv_1 dly2_n(.A(delay2[i-1]), .Y(delay2[i]));
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end
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sky130_fd_sc_hd__and2_1 dly2_sel0(.A(tap2_sel_q[0]), .B(delay2[7]), .X(tap2[0]));
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sky130_fd_sc_hd__and2_1 dly2_sel1(.A(tap2_sel_q[1]), .B(delay2[11]), .X(tap2[1]));
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sky130_fd_sc_hd__and2_1 dly2_sel2(.A(tap2_sel_q[2]), .B(delay2[15]), .X(tap2[2]));
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sky130_fd_sc_hd__or3_1 dly3_0(.A(tap2[0]), .B(tap2[1]), .C(tap2[2]), .X(delay3[0]));
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for (i = 1; i < 4; i = i + 1) begin
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sky130_fd_sc_hd__buf_1 dly3_n (.A(delay3[i-1]), .X(delay3[i]));
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end
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for (i = 0; i < 4; i = i + 1) begin
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sky130_fd_sc_hd__and2_1 dly3_sel(.A(tap3_sel_q[i]), .B(delay3[i]), .X(tap3[i]));
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end
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sky130_fd_sc_hd__nor4_1 dly3_out(.A(tap3[0]), .B(tap3[1]), .C(tap3[2]), .D(tap3[3]), .X(pulse2_b));
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// combine
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sky130_fd_sc_hd__nand2_1 pulse12(.A(pulse1_b), .B(pulse2_b), .Y(pulse));
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// select and invert (neg-active precharge)
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sky130_fd_sc_hd__a22oi_1 strobe_out(.A1(no_delay_q), .A2(clk), .B1(no_delay_b_q), .B2(pulse), .X(strobe));
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end
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endgenerate
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endmodule
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openpowerwtf
7 months ago