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caravel-mpw7-20221125
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trace-test
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litedram-update
liteeth-update
fix-sdcard
fpu-init
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fpu-typo
less-fpga-init
caravel-mpw6-20220530
caravel-mpw5-20220323
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alt-reset-address
log2ceil-issue
fpu-constant
asic-3
boxarty-20211011
icbi-issue
orange-crab-freq
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microwatt/fpga
History
Paul Mackerras 8be7c53ea0
arty a7: Fix build error with Vivado (#429) 
Commit 0ceace927c ("Xilinx FPGAs: Eliminate Vivado critical
warnings", 2024-03-08) incorrectly removed the constraints for
shield_io36 through to shield_io44 (due to me applying the wrong
version of a patch), resulting in Vivado giving compile errors when
building for the Arty A7.  This restores the constraints.

Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
 		9 months ago
..
LICENSE Initial import of microwatt 5 years ago
acorn-cle-215.xdc acorn: Add support for the Acorn CLE 215+ 4 years ago
antmicro_artix_dc_scm.xdc antmicro-artix-dc-scm: Add Ethernet pins 2 years ago
arty_a7.xdc arty a7: Fix build error with Vivado (#429) 9 months ago
clk_gen_bypass.vhd Fix clk_gen_bypass 5 years ago
clk_gen_ecp5.vhd ECP5: Adjust PLL constants so the PLL lock indication works 3 years ago
clk_gen_mcmm.vhd Fix some whitespace issues 3 years ago
clk_gen_plle2.vhd fpga/clk_gen_plle2: Add support for 50Mhz->100Mhz 3 years ago
cmod_a7-35.xdc Remove -add from xdc files 3 years ago
firmware.hex Add a few more FPGA related files 5 years ago
fpga-random.vhdl Add random number generator and implement the darn instruction 4 years ago
fpga-random.xdc Add random number generator and implement the darn instruction 4 years ago
genesys2.xdc Remove -waveform from xdc files 3 years ago
hello_world.hex hello_world: Use new headers and frequency from syscon 5 years ago
main_bram.vhdl Rename 'do' signal to avoid verilator System Verilog warning 3 years ago
nexys-video.xdc litesdcard: Add Nexys Video support 3 years ago
nexys_a7.xdc Remove -add from xdc files 3 years ago
pp_fifo.vhd pp_fifo: Fix full fifo losing all data on simultaneous push & pop 5 years ago
pp_soc_uart.vhd uart: Remove combinational loops on ack and stall signal 5 years ago
pp_utilities.vhd Initial import of microwatt 5 years ago
soc_reset.vhdl soc_reset: Use counters, add synchronizers 5 years ago
soc_reset_tb.vhdl Exit cleanly from testbench on success 5 years ago
top-acorn-cle-215.vhdl Move alt_reset to syscon 2 years ago
top-antmicro-artix-dc-scm.vhdl Move alt_reset to syscon 2 years ago
top-arty.vhdl Xilinx FPGAs: Eliminate Vivado critical warnings 9 months ago
top-generic.vhdl Remove option for "short" 16x16 bit multiplier 2 years ago
top-genesys2.vhdl Move alt_reset to syscon 2 years ago
top-nexys-video.vhdl Move alt_reset to syscon 2 years ago
top-orangecrab0.2.vhdl Move alt_reset to syscon 2 years ago
top-wukong-v2.vhdl Move alt_reset to syscon 2 years ago
wukong-v2.xdc Add support for QMTech Wukong v2 board 3 years ago