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Olof Kindgren 12327034d6 Add and use plle2 primitive for nexys boards		5 years ago
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LICENSE	…
clk_gen_bypass.vhd	Add dummy clock generator	5 years ago
clk_gen_plle2.vhd	Add and use plle2 primitive for nexys boards	5 years ago
firmware.hex	…
hello_world.hex	Add a simple hello_world example that also echos input	5 years ago
nexys-video.xdc	…
nexys_a7.xdc	Add constraint file for Nexys A7	5 years ago
nodivide.patch	…
pp_fifo.vhd	…
pp_soc_memory.vhd	Expose ram init file and memory size through toplevel	5 years ago
pp_soc_reset.vhd	…
pp_soc_uart.vhd	…
pp_utilities.vhd	…
toplevel.vhd	Expose ram init file and memory size through toplevel	5 years ago