Commit Graph

501 Commits (7bc118c7db9aa003301a903002acfc32cec04ed7)
 

Author SHA1 Message Date
Anton Blanchard d1166e9c26
Merge pull request #143 from antonblanchard/use-docker
Add an option to use Docker
4 years ago
Anton Blanchard 5f2efde644 Add some information about GHDL backend issues
A number of people have tripped up on GHDL backend issues. We
require either the LLVM or gcc backend, because the mcode backend
can't link against libraries which we use for simulated memory
and UART. Make that clearer, and point people at the Docker images
if they are having issues building ghdl.

Also point at the prebuilt micropython image.

Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
4 years ago
Anton Blanchard c18830a5e5 Add an option to use Docker
Some distros don't have a version of ghdl with the  LLVM or GCC backend,
so add a Docker image as an alternative.

Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
4 years ago
Anton Blanchard db937403ec Initial support for ghdl synthesis
A first pass at ghdl synthesis using yosys and nextpnr. It runs hello world
or micropython if the FPGA has enough block RAM (eg ECP5 85F). The hello
world testcase also loops UART rx to tx in software (ie not a hardware
loopback).

It uses Docker images, so no software needs to be installed. If you prefer
podman you can use that too. Edit Makefile.synth to configure your FPGA,
JTAG device etc.

To build:

make -f Makefile.synth

and to program:

make -f Makefile.synth prog

A few issues:

We need to add PLL support. Right now Microwatt runs at whatever the
external clock frequency is and the baud rate gets scaled by how far off
50MHz it is. This means on the ecp5-evn with a 12 MHz clock rate the baud
rate is a quite strange 27650 (115200 * 50 / 12). On my OrangeCrab with a
50MHz clock the UART is 115200.

It uses a large amount of resources, way more than it should. There are
still some ghdl/yosys issues to be sorted out.

Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
4 years ago
Anton Blanchard 21a40c2ba6
Merge pull request #140 from antonblanchard/rework-makefile
Fix Makefile dependency issue with files in vhdl/*
4 years ago
Anton Blanchard a4dbbfda4a Fix Makefile dependency issue with files in vhdl/*
GHDL doesn't seem to have a way to specify the location of the object
file it writes, so right now they are all ending up in the root
directory. The Makefile rules did not reflect that, so make would
continually the files in fpga/*

Fix the rules to match what GHDL is doing.

Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
4 years ago
Anton Blanchard d1643443d6
Merge pull request #141 from antonblanchard/update-dependencies.py
Improve dependencies.py and add a --synth option
4 years ago
Anton Blanchard d92f3da606 Improve dependencies.py and add a --synth option
dependencies.py was pretty terrible at actually determining
dependencies. This improves it and also adds a --synth option.

Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
4 years ago
Anton Blanchard ffca138b78
Merge pull request #136 from antonblanchard/uart-rx-metastability
Add a few FFs on the RX input to avoid metastability issues
4 years ago
Anton Blanchard 61d5e61f09 Add a few FFs on the RX input to avoid metastability issues
Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
4 years ago
Anton Blanchard 8569ae0ab1
Merge pull request #139 from antonblanchard/reduce-mem
Reduce mem
4 years ago
Anton Blanchard f5424f8e71 Reduce simulated and default FPGA RAM to 384kB
Micropython has been able to fit into 384kB for ages, so lets reduce our
simulated RAM. This is useful for testing if micropython will run on an
ECP5 85k, which has enough BRAM for 384kB but not enough for 512kB.

Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
4 years ago
Anton Blanchard 488c30fe91 Add log2ceil and use it in bram code
We might want a non power of 2 amount of RAM in order to fit into an
FPGA, so create log2ceil and use it when calculating the number of
memory bits.

Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
4 years ago
Anton Blanchard b3dd31a978
Merge pull request #138 from antonblanchard/micropython-update
Update micropython
4 years ago
Anton Blanchard d0b5050ca4 Update micropython
The current version of micropython in tests/micropython.bin is ancient.
Bug #135 points out that more recent versions are much smaller and they
also handle restart when ctrl+D is pressed.

Save all three versions of the file (elf, bin and hex) in micropython/

Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
4 years ago
Anton Blanchard 4d3da0c7e6
Merge pull request #137 from antonblanchard/hello-world
hello_world updates
4 years ago
Anton Blanchard 75f3614776 hello_world updates
Shrink hello_world a bit (from 12kB to 8kB).
Include the built images
Add 0x10 and 0x100 entry points

Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
4 years ago
Paul Mackerras 2661b9b985 decode1: Mark subfic as pipelined
This seems just to have been missed in commit f291efa266 ("decode1:
Mark ALU ops using carry as pipelined").

Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
4 years ago
Paul Mackerras e08ca4ab8e countzero: Add a register to help make timing
This adds a register in the middle of the countzero computation,
so that we now have two cycles to count leading or trailing zeroes
instead of just one.  Execute1 now outputs a one-cycle stall signal
when it encounters a cntlz* or cnttz* instruction.  With this,
the countzero path no longer fails timing on the Artix-7 at 100MHz.

Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
4 years ago
Paul Mackerras 5422007f83 Plumb loadstore1 input from execute1 not decode2
This allows us to use the bypass at the input of execute1 for the
address and data operands for loadstore1.

Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
4 years ago
Paul Mackerras b14d982011 execute: Implement bypass from output of execute1 to input
This enables back-to-back execution of integer instructions where
the first instruction writes a GPR and the second reads the same
GPR.  This is done with a set of multiplexers at the start of
execute1 which enable any of the three input operands to be taken
from the output of execute1 (i.e. r.e.write_data) rather than the
input from decode2 (i.e. e_in.read_data[123]).

This also requires changes to the hazard detection and handling.
Decode2 generates a signal indicating that the GPR being written
is available for bypass, which is true for instructions that are
executed in execute1 (rather than loadstore1/dcache).  The
gpr_hazard module stores this "bypassable" bit, and if the same
GPR needs to be read by a subsequent instruction, it outputs a
"use_bypass" signal rather than generating a stall.  The
use_bypass signal is then latched at the output of decode2 and
passed down to execute1 to control the input multiplexer.

At the moment there is no bypass on the inputs to loadstore1, but that
is OK because all load and store instructions are marked as
single-issue.

Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
4 years ago
Paul Mackerras 0c714f1be6 execute: Move popcnt and prty instructions into the logical unit
This implements logic in the logical entity to calculate the results
of the popcnt* and prty* instructions.  We now have one insn_type_t
value for the 3 popcnt variants and one for the two prty variants,
using the length field of the decode_rom_t to distinguish between
them.  The implementations in logical.vhdl using recursive
algorithms rather than the simple functions in ppc_fx_insns.vhdl.

This gives a saving of about 140 slice LUTs on the A7-100 and
improves timing slightly.

Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
4 years ago
Paul Mackerras d2ca625b3b execute: Do comparisons using the main adder
This handles OP_CMP like a subtraction; the main adder computes
~RA + RB + 1, and the condition codes are computed from the results.
A direct comparison of the two input operands is used to calculate the
EQ bit of the condition result.  The LT and GT bits are computed from
the MSB of the subtraction result, the carry out from the subtraction,
and the MSBs of the operands.  For a 32-bit comparison, the 32-bit
carry and bit 31 of the result and input operands are used; for a
64-bit comparison, the 64-bit carry and bit 63 of the operands and
result are used.

It turns out to be more convenient to use the 'signed' field of
the decode table to distinguish signed from unsigned comparisons,
rather than the insn_type.  Therefore this uses OP_CMP for both
cmp and cmpl, which also has the benefit of reducing the number
of values in insn_type_t.

Doing this saves over 200 slice LUTs on the Arty A7-100 and improves
timing slightly as well.

Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
4 years ago
Paul Mackerras d956846667 execute1: Move EXTS* instruction back into execute1
This moves the sign extension done by the extsb, extsh and extsw
instructions back into execute1.  This means that we no longer need
any data formatting in writeback for results coming from execute1,
so this modifies writeback so the data formatter inputs come
directly from the loadstore unit output.  The condition code
updates for RC=1 form instructions are now done on the value from
execute1 rather than the output of the data formatter, which should
help timing.

Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
4 years ago
Paul Mackerras c9a2076dd3 execute1: Remember dest GPR, RC, OE, XER for slow operations
For multiply and divide operations, execute1 now records the
destination GPR number, RC and OE from the instruction, and the
XER value.  This means that the multiply and divide units don't
need to record those values and then send them back to execute1.
This makes the interface to those units a bit simpler.  They
simply report an overflow signal along with the result value, and
execute1 takes care of updating XER if necessary.

Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
4 years ago
Paul Mackerras 39d18d2738 Make divider hang off the side of execute1
With this, the divider is a unit that execute1 sends operands to and
which sends its results back to execute1, which then send them to
writeback.  Execute1 now sends a stall signal when it gets a divide
or modulus instruction until it gets a valid signal back from the
divider.  Divide and modulus instructions are no longer marked as
single-issue.

The data formatting step that used to be done in decode2 for div
and mod instructions is now done in execute1.  We also do the
absolute value operation in that same cycle instead of taking an
extra cycle inside the divider for signed operations with a
negative operand.

Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
4 years ago
Paul Mackerras 2167186b5f Make multiplier hang off the side of execute1
With this, the multiplier isn't a separate pipe that decode2 issues
instructions to, but rather is a unit that execute1 sends operands
to and which sends the result back to execute1, which then sends it
to writeback.  Execute1 now sends a stall signal when it gets a
multiply instruction until it gets a valid signal back from the
multiplier.

This all means that we no longer need to mark the multiply
instructions as single-issue.

Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
4 years ago
Anton Blanchard 969245e379
Merge pull request #133 from antonblanchard/ghdl-synth
Ghdl synth
4 years ago
Anton Blanchard 729a35967a
Merge pull request #132 from antonblanchard/bin2hex-move
Move bin2hex.py to scripts/
4 years ago
Anton Blanchard 9362f2dd10 Move bin2hex.py to scripts/
Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
4 years ago
Anton Blanchard f1d0382587 Fix a ghdlsynth issue in fast_spr_num
I've submitted a bug report for this, but we can work around it easily
for now.

Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
4 years ago
Anton Blanchard dcee60a729 Fix a ghdlsynth issue in icache
ghdlsynth doesn't like the debug statement, so wrap it in a generate.

Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
4 years ago
Anton Blanchard 3ad3e2abfd Removed unused core_terminated signal
Right now it's unused. We can add it back when we add an LED to signify
the core has terminated.

Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
4 years ago
Anton Blanchard 14c5cf3b83 Fix some ghdlsynth issues with fpga_bram
Use to_integer() instead of conv_integer().

Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
4 years ago
Anton Blanchard b0212b0bf9 Fix ghdlsynth issue in register file
We need to drive sim_dump_done to keep ghdlsynth happy.

Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
4 years ago
Anton Blanchard f37ef56d79 Remove unused signal
Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
4 years ago
Anton Blanchard 25968951e4 Fix a ghdysynth inferred latch error in writeback
Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
4 years ago
Anton Blanchard ad3db18dce Fix a ghdysynth inferred latch error in execute
It should never happen in practise, but ghdlsynth is complaining about
an inferred latch here. Fix it

Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
4 years ago
Anton Blanchard 0a6fd0adb5
Merge pull request #131 from antonblanchard/new-tests
Dump CTR, LR and CR on sim termination, and update our tests
4 years ago
Anton Blanchard cc8a9e7893 Upper 32 bits of XER should read as 0s
From the architecture:

  bits 0:31 and 35:43 are treated as reserved and return 0s when read
  using mfxer

Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
4 years ago
Anton Blanchard 467630573c Dump CTR, LR and CR on sim termination, and update our tests
Right now our test cases fold the SPRs into the GPRs. That makes
debugging fails more difficult than it needs to be, so print
out the CTR, LR and CR.

We still need to print the XER, but that is in two spots in microwatt
and will take some more work.

This also adds many instructions to the tests that we have added
lately including overflow instructions, CR logicals and mt/mfxer.

Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
4 years ago
Anton Blanchard 115d63eaf3
Merge pull request #127 from tomtor/CR-PR
Implement CRNOR and friends
4 years ago
Anton Blanchard 320fc88d56
Merge pull request #130 from antonblanchard/build-fix
control: Fix build issue with Fedora 31 version of GHDL
4 years ago
Anton Blanchard 72aac38581
Merge pull request #129 from antonblanchard/update-micropython
Point to upstream micropython
4 years ago
Anton Blanchard 1aec1a4b0e Point to upstream micropython
Our changes are now merged upstream, so point there instead.

Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
4 years ago
Tom Vijlbrief c05441bf47 Implement CRNOR and friends
Signed-off-by: Tom Vijlbrief <tvijlbrief@gmail.com>
4 years ago
Anton Blanchard 9a67e3b4fe
Merge pull request #126 from sharkcz/docs
document packaged fusesoc for Fedora users
4 years ago
Dan Horák f552021d19 document packaged fusesoc for Fedora users
Signed-off-by: Dan Horák <dan@danny.cz>
4 years ago
Anton Blanchard 1c05f330c6 control: Fix build issue with Fedora 31 version of GHDL
I'm hitting an issue with the Fedora 31 version of GHDL that
appears to be fixed upstream:

control.vhdl:105:39:error: actual expression must be globally static

Add a signal to get rid of error.

Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
5 years ago
Anton Blanchard 1a826f077b
Merge pull request #122 from paulusmack/benh-sprs
Benh sprs
5 years ago