Merge pull request #278 from shenki/openocd-v0.11

Add files for openocd v0.11
pull/288/head
Paul Mackerras 4 years ago committed by GitHub
commit d8ea64675a
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@ -23,10 +23,11 @@ Info : JTAG tap: xc7.tap tap/device found: 0x0362d093 (mfg: 0x049 (Xilinx), part
Error: Unknown flash device (ID 0x00ffffff)

If you find yourself with a later openocd version that contians 867bdb2e9248
("jtagspi: new protocol that includes transfer length") you should fetch the
bitstream from the master branch:
("jtagspi: new protocol that includes transfer length"), such as v0.11 as
packaged by Debian Bullseye, you should use the bitstream from the master
branch:

https://github.com/quartiq/bscan_spi_bitstreams/blob/master/bscan_spi_xc7a35t.bit?raw=true
https://github.com/quartiq/bscan_spi_bitstreams/blob/master/bscan_spi_xc7a100t.bit?raw=true


These are in the microwatt repository as bscan_spi_xc7a*t_openocd_v0.11.bit.

@ -6,7 +6,6 @@ import subprocess
import sys

BASE = os.path.dirname(os.path.abspath(__file__))
CONFIG = os.path.join(BASE, "xilinx-xc7.cfg")

def flash(config, flash_proxy, address, data, filetype="", set_qe=False):
script = "; ".join([
@ -20,6 +19,15 @@ def flash(config, flash_proxy, address, data, filetype="", set_qe=False):
print(script)
subprocess.call(["openocd", "-f", config, "-c", script])

def get_version():
a = subprocess.run(["openocd", "-v"], capture_output=True)
if a.returncode != 0:
return ""
if a.stderr.count(b"0.10"):
return ""
if a.stderr.count(b"0.11"):
return "_openocd_v0.11"

parser = argparse.ArgumentParser()
parser.add_argument("file", help="file to write to flash")
parser.add_argument("-a", "--address", help="offset in flash", type=lambda x: int(x,0), default=0)
@ -27,16 +35,19 @@ parser.add_argument("-f", "--fpga", help="a35, a100 or a200", default="a35")
parser.add_argument("-t", "--filetype", help="file type such as 'bin'", default="")
args = parser.parse_args()

version = get_version()

if args.fpga.lower() == "a35":
proxy = "bscan_spi_xc7a35t.bit"
proxy = "bscan_spi_xc7a35t{}.bit".format(version)
elif args.fpga.lower() == "a100":
proxy = "bscan_spi_xc7a100t.bit"
proxy = "bscan_spi_xc7a100t{}.bit".format(version)
elif args.fpga.lower() == "a200":
proxy = "bscan_spi_xc7a200t.bit"
proxy = "bscan_spi_xc7a200t{}.bit".format(version)
else:
print("error: specify a35, a100 or a200 when flashing")
sys.exit()

proxy = os.path.join(BASE, proxy)
config = os.path.join(BASE, "xilinx-xc7{}.cfg".format(version))

flash(CONFIG, proxy, args.address, args.file, args.filetype.lower())
flash(config, proxy, args.address, args.file, args.filetype.lower())

@ -0,0 +1,68 @@
# This file is the same sa xilinx-xc7.cfg, except we use
# verify_image instead of verify_bank

interface ftdi
ftdi_vid_pid 0x0403 0x6010
ftdi_channel 0
ftdi_layout_init 0x00e8 0x60eb
reset_config none
adapter_khz 25000

source [find cpld/xilinx-xc7.cfg]

# From jtagspi.cfg with modification to support
# specifying file type
set _USER1 0x02

if { [info exists JTAGSPI_IR] } {
set _JTAGSPI_IR $JTAGSPI_IR
} else {
set _JTAGSPI_IR $_USER1
}

if { [info exists DR_LENGTH] } {
set _DR_LENGTH $DR_LENGTH
} else {
set _DR_LENGTH 1
}

if { [info exists TARGETNAME] } {
set _TARGETNAME $TARGETNAME
} else {
set _TARGETNAME $_CHIPNAME.proxy
}

if { [info exists FLASHNAME] } {
set _FLASHNAME $FLASHNAME
} else {
set _FLASHNAME $_CHIPNAME.spi
}

target create $_TARGETNAME testee -chain-position $_CHIPNAME.tap
flash bank $_FLASHNAME jtagspi 0 0 0 0 $_TARGETNAME $_JTAGSPI_IR $_DR_LENGTH

proc jtagspi_init {chain_id proxy_bit} {
# load proxy bitstream $proxy_bit and probe spi flash
global _FLASHNAME
pld load $chain_id $proxy_bit
reset halt
flash probe $_FLASHNAME
}

proc jtagspi_program {bin addr {type ""} } {
# write and verify binary file $bin at offset $addr
global _FLASHNAME
if { $type eq "" } {
flash write_image erase $bin $addr
flash verify_image $bin $addr
} else {
flash write_image erase $bin $addr $type
flash verify_image $bin $addr $type
}
}
# end jtagspi.cfg

proc fpga_program {} {
global _CHIPNAME
xc7_program $_CHIPNAME.tap
}
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