core: Implement HRMOR as a read-only zero register

Signed-off-by: Paul Mackerras <paulus@ozlabs.org>

common.vhdl

@@ -84,6 +84,7 @@ package common is
     constant SPR_NOOP3  : spr_num_t := 811;
     constant SPR_HMER   : spr_num_t := 336;
     constant SPR_HMEER  : spr_num_t := 337;
+    constant SPR_HRMOR  : spr_num_t := 313;
 
     -- PMU registers
     constant SPR_UPMC1  : spr_num_t := 771;

decode1.vhdl

@@ -521,7 +521,7 @@ architecture behaviour of decode1 is
                 i.ronly := '1';
             when SPR_NOOP0 | SPR_NOOP1 | SPR_NOOP2 | SPR_NOOP3 =>
                 i.noop := '1';
-            when SPR_HMER | SPR_HMEER =>
+            when SPR_HMER | SPR_HMEER | SPR_HRMOR =>
                 i.sel := SPRSEL_ZERO;
             when others =>
                 i.valid := '0';