From 6e905cec70ca31997bf68dcb4824441d0e74653e Mon Sep 17 00:00:00 2001 From: Paul Mackerras Date: Mon, 25 Aug 2025 08:54:17 +1000 Subject: [PATCH] core: Implement HRMOR as a read-only zero register Signed-off-by: Paul Mackerras --- common.vhdl | 1 + decode1.vhdl | 2 +- 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/common.vhdl b/common.vhdl index c3224fd..41969e2 100644 --- a/common.vhdl +++ b/common.vhdl @@ -84,6 +84,7 @@ package common is constant SPR_NOOP3 : spr_num_t := 811; constant SPR_HMER : spr_num_t := 336; constant SPR_HMEER : spr_num_t := 337; + constant SPR_HRMOR : spr_num_t := 313; -- PMU registers constant SPR_UPMC1 : spr_num_t := 771; diff --git a/decode1.vhdl b/decode1.vhdl index afe7610..d70f192 100644 --- a/decode1.vhdl +++ b/decode1.vhdl @@ -521,7 +521,7 @@ architecture behaviour of decode1 is i.ronly := '1'; when SPR_NOOP0 | SPR_NOOP1 | SPR_NOOP2 | SPR_NOOP3 => i.noop := '1'; - when SPR_HMER | SPR_HMEER => + when SPR_HMER | SPR_HMEER | SPR_HRMOR => i.sel := SPRSEL_ZERO; when others => i.valid := '0';