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// © IBM Corp. 2020
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// Licensed under the Apache License, Version 2.0 (the "License"), as modified by
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// the terms below; you may not use the files in this repository except in
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// compliance with the License as modified.
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// You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0
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//
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// Modified Terms:
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//
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// 1) For the purpose of the patent license granted to you in Section 3 of the
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// License, the "Work" hereby includes implementations of the work of authorship
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// in physical form.
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//
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// 2) Notwithstanding any terms to the contrary in the License, any licenses
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// necessary for implementation of the Work that are available from OpenPOWER
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// via the Power ISA End User License Agreement (EULA) are explicitly excluded
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// hereunder, and may be obtained from OpenPOWER under the terms and conditions
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// of the EULA.
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//
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// Unless required by applicable law or agreed to in writing, the reference design
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// distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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// WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License
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// for the specific language governing permissions and limitations under the License.
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//
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// Additional rights, including the ability to physically implement a softcore that
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// is compliant with the required sections of the Power ISA Specification, are
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// available at no cost under the terms of the OpenPOWER Power ISA EULA, which can be
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// obtained (along with the Power ISA) here: https://openpowerfoundation.org.
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`timescale 1 ns / 1 ns
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//*****************************************************************************
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// Description: XU Population Count
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//
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//*****************************************************************************
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`include "tri_a2o.vh"
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module tri_st_popcnt(
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clk,
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rst,
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vdd,
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gnd,
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delay_lclkr_dc,
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mpw1_dc_b,
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mpw2_dc_b,
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d_mode_dc,
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func_sl_force,
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func_sl_thold_0_b,
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sg_0,
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scan_in,
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scan_out,
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ex1_act,
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ex1_instr,
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ex2_popcnt_rs1,
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ex4_popcnt_rt
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);
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//-------------------------------------------------------------------
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// Clocks & Power
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//-------------------------------------------------------------------
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input clk;
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input rst;
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inout vdd;
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inout gnd;
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//-------------------------------------------------------------------
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// Pervasive
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//-------------------------------------------------------------------
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input delay_lclkr_dc;
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input mpw1_dc_b;
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input mpw2_dc_b;
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input d_mode_dc;
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input func_sl_force;
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input func_sl_thold_0_b;
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input sg_0;
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(* pin_data="PIN_FUNCTION=/SCAN_IN/" *) // scan_in
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input scan_in;
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(* pin_data="PIN_FUNCTION=/SCAN_OUT/" *) // scan_out
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output scan_out;
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input ex1_act;
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input [22:23] ex1_instr;
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input [0:63] ex2_popcnt_rs1;
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output [0:63] ex4_popcnt_rt;
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// Latches
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wire [2:3] exx_act_q; // input=>exx_act_d ,act=>1
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wire [2:3] exx_act_d;
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wire [22:23] ex2_instr_q; // input=>ex1_instr ,act=>exx_act(1)
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wire [0:2] ex3_popcnt_sel_q; // input=>ex2_popcnt_sel ,act=>exx_act(2)
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wire [0:2] ex2_popcnt_sel;
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wire [0:7] ex3_b3_q; // input=>ex2_b3 ,act=>exx_act(2)
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wire [0:7] ex2_b3;
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wire [0:7] ex3_b2_q; // input=>ex2_b2 ,act=>exx_act(2)
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wire [0:7] ex2_b2;
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wire [0:7] ex3_b1_q; // input=>ex2_b1 ,act=>exx_act(2)
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wire [0:7] ex2_b1;
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wire [0:7] ex3_b0_q; // input=>ex2_b0 ,act=>exx_act(2)
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wire [0:7] ex2_b0;
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wire [0:7] ex4_b3_q; // input=>ex3_b3_q ,act=>exx_act(3)
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wire [0:7] ex4_b2_q; // input=>ex3_b2_q ,act=>exx_act(3)
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wire [0:7] ex4_b1_q; // input=>ex3_b1_q ,act=>exx_act(3)
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wire [0:7] ex4_b0_q; // input=>ex3_b0_q ,act=>exx_act(3)
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wire [0:5] ex4_word0_q; // input=>ex3_word0 ,act=>exx_act(3)
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wire [0:5] ex3_word0;
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wire [0:5] ex4_word1_q; // input=>ex3_word1 ,act=>exx_act(3)
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wire [0:5] ex3_word1;
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wire [0:2] ex4_popcnt_sel_q; // input=>ex3_popcnt_sel_q ,act=>exx_act(3)
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// Scanchain
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parameter exx_act_offset = 0;
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parameter ex2_instr_offset = exx_act_offset + 2;
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parameter ex3_popcnt_sel_offset = ex2_instr_offset + 2;
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parameter ex3_b3_offset = ex3_popcnt_sel_offset + 3;
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parameter ex3_b2_offset = ex3_b3_offset + 8;
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parameter ex3_b1_offset = ex3_b2_offset + 8;
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parameter ex3_b0_offset = ex3_b1_offset + 8;
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parameter ex4_b3_offset = ex3_b0_offset + 8;
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parameter ex4_b2_offset = ex4_b3_offset + 8;
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parameter ex4_b1_offset = ex4_b2_offset + 8;
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parameter ex4_b0_offset = ex4_b1_offset + 8;
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parameter ex4_word0_offset = ex4_b0_offset + 8;
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parameter ex4_word1_offset = ex4_word0_offset + 6;
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parameter ex4_popcnt_sel_offset = ex4_word1_offset + 6;
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parameter scan_right = ex4_popcnt_sel_offset + 3;
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wire [0:scan_right-1] siv;
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wire [0:scan_right-1] sov;
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// Signals
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wire [0:63] ex4_popcnt_byte;
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wire [0:63] ex4_popcnt_word;
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wire [0:63] ex4_popcnt_dword;
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wire [1:3] exx_act;
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assign exx_act_d[2:3] = exx_act[1:2];
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assign exx_act[1:3] = {ex1_act, exx_act_q[2:3]};
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generate
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genvar i;
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for (i = 0; i <= 7; i = i + 1)
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begin : byte_gen
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tri_st_popcnt_byte bytes(
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.b0(ex2_popcnt_rs1[8*i:8*i+7]),
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.y({ex2_b3[i],ex2_b2[i],ex2_b1[i],ex2_b0[i]}),
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.vdd(vdd),
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.gnd(gnd)
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);
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assign ex4_popcnt_byte[8*i+0:8*i+3] = 0;
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assign ex4_popcnt_byte[8*i+4] = ex4_b3_q[i];
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assign ex4_popcnt_byte[8*i+5] = ex4_b2_q[i];
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assign ex4_popcnt_byte[8*i+6] = ex4_b1_q[i];
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assign ex4_popcnt_byte[8*i+7] = ex4_b0_q[i];
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end
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endgenerate
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tri_st_popcnt_word word0(
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.b0(ex3_b0_q[0:3]),
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.b1(ex3_b1_q[0:3]),
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.b2(ex3_b2_q[0:3]),
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.b3(ex3_b3_q[0:3]),
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.y(ex3_word0),
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.vdd(vdd),
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.gnd(gnd)
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);
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tri_st_popcnt_word word1(
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.b0(ex3_b0_q[4:7]),
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.b1(ex3_b1_q[4:7]),
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.b2(ex3_b2_q[4:7]),
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.b3(ex3_b3_q[4:7]),
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.y(ex3_word1),
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.vdd(vdd),
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.gnd(gnd)
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);
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assign ex4_popcnt_word[00:25] = {26{1'b0}};
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assign ex4_popcnt_word[26:31] = ex4_word0_q;
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assign ex4_popcnt_word[32:57] = {26{1'b0}};
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assign ex4_popcnt_word[58:63] = ex4_word1_q;
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assign ex4_popcnt_dword[00:56] = {57{1'b0}};
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assign ex4_popcnt_dword[57:63] = {1'b0, ex4_word0_q} + {1'b0, ex4_word1_q};
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assign ex2_popcnt_sel[0] = (ex2_instr_q == 2'b00) ? 1'b1 : 1'b0;
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assign ex2_popcnt_sel[1] = (ex2_instr_q == 2'b10) ? 1'b1 : 1'b0;
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assign ex2_popcnt_sel[2] = (ex2_instr_q == 2'b11) ? 1'b1 : 1'b0;
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assign ex4_popcnt_rt = (ex4_popcnt_byte & {64{ex4_popcnt_sel_q[0]}}) |
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(ex4_popcnt_word & {64{ex4_popcnt_sel_q[1]}}) |
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(ex4_popcnt_dword & {64{ex4_popcnt_sel_q[2]}});
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//-------------------------------------------------------------------
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// Latch instances
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//-------------------------------------------------------------------
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tri_rlmreg_p #(.WIDTH(2), .INIT(0), .NEEDS_SRESET(1)) exx_act_latch(
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.clk(clk),
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.rst(rst),
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.vd(vdd),
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.gd(gnd),
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.act(1'b1),
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.force_t(func_sl_force),
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.d_mode(d_mode_dc),
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.delay_lclkr(delay_lclkr_dc),
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.mpw1_b(mpw1_dc_b),
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.mpw2_b(mpw2_dc_b),
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.thold_b(func_sl_thold_0_b),
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.sg(sg_0),
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.scin(siv[exx_act_offset:exx_act_offset + 2 - 1]),
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.scout(sov[exx_act_offset:exx_act_offset + 2 - 1]),
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.din(exx_act_d),
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.dout(exx_act_q)
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);
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tri_rlmreg_p #(.WIDTH(2), .INIT(0), .NEEDS_SRESET(1)) ex2_instr_latch(
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.clk(clk),
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.rst(rst),
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.vd(vdd),
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.gd(gnd),
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.act(exx_act[1]),
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.force_t(func_sl_force),
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.d_mode(d_mode_dc),
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.delay_lclkr(delay_lclkr_dc),
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.mpw1_b(mpw1_dc_b),
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.mpw2_b(mpw2_dc_b),
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.thold_b(func_sl_thold_0_b),
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.sg(sg_0),
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.scin(siv[ex2_instr_offset:ex2_instr_offset + 2 - 1]),
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.scout(sov[ex2_instr_offset:ex2_instr_offset + 2 - 1]),
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.din(ex1_instr),
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.dout(ex2_instr_q)
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);
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tri_rlmreg_p #(.WIDTH(3), .INIT(0), .NEEDS_SRESET(1)) ex3_popcnt_sel_latch(
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.clk(clk),
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.rst(rst),
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.vd(vdd),
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.gd(gnd),
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.act(exx_act[2]),
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.force_t(func_sl_force),
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.d_mode(d_mode_dc),
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.delay_lclkr(delay_lclkr_dc),
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.mpw1_b(mpw1_dc_b),
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.mpw2_b(mpw2_dc_b),
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.thold_b(func_sl_thold_0_b),
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.sg(sg_0),
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.scin(siv[ex3_popcnt_sel_offset:ex3_popcnt_sel_offset + 3 - 1]),
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.scout(sov[ex3_popcnt_sel_offset:ex3_popcnt_sel_offset + 3 - 1]),
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.din(ex2_popcnt_sel),
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.dout(ex3_popcnt_sel_q)
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);
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tri_rlmreg_p #(.WIDTH(8), .INIT(0), .NEEDS_SRESET(1)) ex3_b3_latch(
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.clk(clk),
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.rst(rst),
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.vd(vdd),
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.gd(gnd),
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.act(exx_act[2]),
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.force_t(func_sl_force),
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.d_mode(d_mode_dc),
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.delay_lclkr(delay_lclkr_dc),
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.mpw1_b(mpw1_dc_b),
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.mpw2_b(mpw2_dc_b),
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.thold_b(func_sl_thold_0_b),
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.sg(sg_0),
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.scin(siv[ex3_b3_offset:ex3_b3_offset + 8 - 1]),
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.scout(sov[ex3_b3_offset:ex3_b3_offset + 8 - 1]),
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.din(ex2_b3),
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.dout(ex3_b3_q)
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);
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tri_rlmreg_p #(.WIDTH(8), .INIT(0), .NEEDS_SRESET(1)) ex3_b2_latch(
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.clk(clk),
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.rst(rst),
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.vd(vdd),
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.gd(gnd),
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.act(exx_act[2]),
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.force_t(func_sl_force),
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.d_mode(d_mode_dc),
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.delay_lclkr(delay_lclkr_dc),
|
|
|
|
|
.mpw1_b(mpw1_dc_b),
|
|
|
|
|
.mpw2_b(mpw2_dc_b),
|
|
|
|
|
.thold_b(func_sl_thold_0_b),
|
|
|
|
|
.sg(sg_0),
|
|
|
|
|
.scin(siv[ex3_b2_offset:ex3_b2_offset + 8 - 1]),
|
|
|
|
|
.scout(sov[ex3_b2_offset:ex3_b2_offset + 8 - 1]),
|
|
|
|
|
.din(ex2_b2),
|
|
|
|
|
.dout(ex3_b2_q)
|
|
|
|
|
);
|
|
|
|
|
|
|
|
|
|
tri_rlmreg_p #(.WIDTH(8), .INIT(0), .NEEDS_SRESET(1)) ex3_b1_latch(
|
|
|
|
|
.clk(clk),
|
|
|
|
|
.rst(rst),
|
|
|
|
|
.vd(vdd),
|
|
|
|
|
.gd(gnd),
|
|
|
|
|
.act(exx_act[2]),
|
|
|
|
|
.force_t(func_sl_force),
|
|
|
|
|
.d_mode(d_mode_dc),
|
|
|
|
|
.delay_lclkr(delay_lclkr_dc),
|
|
|
|
|
.mpw1_b(mpw1_dc_b),
|
|
|
|
|
.mpw2_b(mpw2_dc_b),
|
|
|
|
|
.thold_b(func_sl_thold_0_b),
|
|
|
|
|
.sg(sg_0),
|
|
|
|
|
.scin(siv[ex3_b1_offset:ex3_b1_offset + 8 - 1]),
|
|
|
|
|
.scout(sov[ex3_b1_offset:ex3_b1_offset + 8 - 1]),
|
|
|
|
|
.din(ex2_b1),
|
|
|
|
|
.dout(ex3_b1_q)
|
|
|
|
|
);
|
|
|
|
|
|
|
|
|
|
tri_rlmreg_p #(.WIDTH(8), .INIT(0), .NEEDS_SRESET(1)) ex3_b0_latch(
|
|
|
|
|
.clk(clk),
|
|
|
|
|
.rst(rst),
|
|
|
|
|
.vd(vdd),
|
|
|
|
|
.gd(gnd),
|
|
|
|
|
.act(exx_act[2]),
|
|
|
|
|
.force_t(func_sl_force),
|
|
|
|
|
.d_mode(d_mode_dc),
|
|
|
|
|
.delay_lclkr(delay_lclkr_dc),
|
|
|
|
|
.mpw1_b(mpw1_dc_b),
|
|
|
|
|
.mpw2_b(mpw2_dc_b),
|
|
|
|
|
.thold_b(func_sl_thold_0_b),
|
|
|
|
|
.sg(sg_0),
|
|
|
|
|
.scin(siv[ex3_b0_offset:ex3_b0_offset + 8 - 1]),
|
|
|
|
|
.scout(sov[ex3_b0_offset:ex3_b0_offset + 8 - 1]),
|
|
|
|
|
.din(ex2_b0),
|
|
|
|
|
.dout(ex3_b0_q)
|
|
|
|
|
);
|
|
|
|
|
|
|
|
|
|
tri_rlmreg_p #(.WIDTH(8), .INIT(0), .NEEDS_SRESET(1)) ex4_b3_latch(
|
|
|
|
|
.clk(clk),
|
|
|
|
|
.rst(rst),
|
|
|
|
|
.vd(vdd),
|
|
|
|
|
.gd(gnd),
|
|
|
|
|
.act(exx_act[3]),
|
|
|
|
|
.force_t(func_sl_force),
|
|
|
|
|
.d_mode(d_mode_dc),
|
|
|
|
|
.delay_lclkr(delay_lclkr_dc),
|
|
|
|
|
.mpw1_b(mpw1_dc_b),
|
|
|
|
|
.mpw2_b(mpw2_dc_b),
|
|
|
|
|
.thold_b(func_sl_thold_0_b),
|
|
|
|
|
.sg(sg_0),
|
|
|
|
|
.scin(siv[ex4_b3_offset:ex4_b3_offset + 8 - 1]),
|
|
|
|
|
.scout(sov[ex4_b3_offset:ex4_b3_offset + 8 - 1]),
|
|
|
|
|
.din(ex3_b3_q),
|
|
|
|
|
.dout(ex4_b3_q)
|
|
|
|
|
);
|
|
|
|
|
|
|
|
|
|
tri_rlmreg_p #(.WIDTH(8), .INIT(0), .NEEDS_SRESET(1)) ex4_b2_latch(
|
|
|
|
|
.clk(clk),
|
|
|
|
|
.rst(rst),
|
|
|
|
|
.vd(vdd),
|
|
|
|
|
.gd(gnd),
|
|
|
|
|
.act(exx_act[3]),
|
|
|
|
|
.force_t(func_sl_force),
|
|
|
|
|
.d_mode(d_mode_dc),
|
|
|
|
|
.delay_lclkr(delay_lclkr_dc),
|
|
|
|
|
.mpw1_b(mpw1_dc_b),
|
|
|
|
|
.mpw2_b(mpw2_dc_b),
|
|
|
|
|
.thold_b(func_sl_thold_0_b),
|
|
|
|
|
.sg(sg_0),
|
|
|
|
|
.scin(siv[ex4_b2_offset:ex4_b2_offset + 8 - 1]),
|
|
|
|
|
.scout(sov[ex4_b2_offset:ex4_b2_offset + 8 - 1]),
|
|
|
|
|
.din(ex3_b2_q),
|
|
|
|
|
.dout(ex4_b2_q)
|
|
|
|
|
);
|
|
|
|
|
|
|
|
|
|
tri_rlmreg_p #(.WIDTH(8), .INIT(0), .NEEDS_SRESET(1)) ex4_b1_latch(
|
|
|
|
|
.clk(clk),
|
|
|
|
|
.rst(rst),
|
|
|
|
|
.vd(vdd),
|
|
|
|
|
.gd(gnd),
|
|
|
|
|
.act(exx_act[3]),
|
|
|
|
|
.force_t(func_sl_force),
|
|
|
|
|
.d_mode(d_mode_dc),
|
|
|
|
|
.delay_lclkr(delay_lclkr_dc),
|
|
|
|
|
.mpw1_b(mpw1_dc_b),
|
|
|
|
|
.mpw2_b(mpw2_dc_b),
|
|
|
|
|
.thold_b(func_sl_thold_0_b),
|
|
|
|
|
.sg(sg_0),
|
|
|
|
|
.scin(siv[ex4_b1_offset:ex4_b1_offset + 8 - 1]),
|
|
|
|
|
.scout(sov[ex4_b1_offset:ex4_b1_offset + 8 - 1]),
|
|
|
|
|
.din(ex3_b1_q),
|
|
|
|
|
.dout(ex4_b1_q)
|
|
|
|
|
);
|
|
|
|
|
|
|
|
|
|
tri_rlmreg_p #(.WIDTH(8), .INIT(0), .NEEDS_SRESET(1)) ex4_b0_latch(
|
|
|
|
|
.clk(clk),
|
|
|
|
|
.rst(rst),
|
|
|
|
|
.vd(vdd),
|
|
|
|
|
.gd(gnd),
|
|
|
|
|
.act(exx_act[3]),
|
|
|
|
|
.force_t(func_sl_force),
|
|
|
|
|
.d_mode(d_mode_dc),
|
|
|
|
|
.delay_lclkr(delay_lclkr_dc),
|
|
|
|
|
.mpw1_b(mpw1_dc_b),
|
|
|
|
|
.mpw2_b(mpw2_dc_b),
|
|
|
|
|
.thold_b(func_sl_thold_0_b),
|
|
|
|
|
.sg(sg_0),
|
|
|
|
|
.scin(siv[ex4_b0_offset:ex4_b0_offset + 8 - 1]),
|
|
|
|
|
.scout(sov[ex4_b0_offset:ex4_b0_offset + 8 - 1]),
|
|
|
|
|
.din(ex3_b0_q),
|
|
|
|
|
.dout(ex4_b0_q)
|
|
|
|
|
);
|
|
|
|
|
|
|
|
|
|
tri_rlmreg_p #(.WIDTH(6), .INIT(0), .NEEDS_SRESET(1)) ex4_word0_latch(
|
|
|
|
|
.clk(clk),
|
|
|
|
|
.rst(rst),
|
|
|
|
|
.vd(vdd),
|
|
|
|
|
.gd(gnd),
|
|
|
|
|
.act(exx_act[3]),
|
|
|
|
|
.force_t(func_sl_force),
|
|
|
|
|
.d_mode(d_mode_dc),
|
|
|
|
|
.delay_lclkr(delay_lclkr_dc),
|
|
|
|
|
.mpw1_b(mpw1_dc_b),
|
|
|
|
|
.mpw2_b(mpw2_dc_b),
|
|
|
|
|
.thold_b(func_sl_thold_0_b),
|
|
|
|
|
.sg(sg_0),
|
|
|
|
|
.scin(siv[ex4_word0_offset:ex4_word0_offset + 6 - 1]),
|
|
|
|
|
.scout(sov[ex4_word0_offset:ex4_word0_offset + 6 - 1]),
|
|
|
|
|
.din(ex3_word0),
|
|
|
|
|
.dout(ex4_word0_q)
|
|
|
|
|
);
|
|
|
|
|
|
|
|
|
|
tri_rlmreg_p #(.WIDTH(6), .INIT(0), .NEEDS_SRESET(1)) ex4_word1_latch(
|
|
|
|
|
.clk(clk),
|
|
|
|
|
.rst(rst),
|
|
|
|
|
.vd(vdd),
|
|
|
|
|
.gd(gnd),
|
|
|
|
|
.act(exx_act[3]),
|
|
|
|
|
.force_t(func_sl_force),
|
|
|
|
|
.d_mode(d_mode_dc),
|
|
|
|
|
.delay_lclkr(delay_lclkr_dc),
|
|
|
|
|
.mpw1_b(mpw1_dc_b),
|
|
|
|
|
.mpw2_b(mpw2_dc_b),
|
|
|
|
|
.thold_b(func_sl_thold_0_b),
|
|
|
|
|
.sg(sg_0),
|
|
|
|
|
.scin(siv[ex4_word1_offset:ex4_word1_offset + 6 - 1]),
|
|
|
|
|
.scout(sov[ex4_word1_offset:ex4_word1_offset + 6 - 1]),
|
|
|
|
|
.din(ex3_word1),
|
|
|
|
|
.dout(ex4_word1_q)
|
|
|
|
|
);
|
|
|
|
|
|
|
|
|
|
tri_rlmreg_p #(.WIDTH(3), .INIT(0), .NEEDS_SRESET(1)) ex4_popcnt_sel_latch(
|
|
|
|
|
.clk(clk),
|
|
|
|
|
.rst(rst),
|
|
|
|
|
.vd(vdd),
|
|
|
|
|
.gd(gnd),
|
|
|
|
|
.act(exx_act[3]),
|
|
|
|
|
.force_t(func_sl_force),
|
|
|
|
|
.d_mode(d_mode_dc),
|
|
|
|
|
.delay_lclkr(delay_lclkr_dc),
|
|
|
|
|
.mpw1_b(mpw1_dc_b),
|
|
|
|
|
.mpw2_b(mpw2_dc_b),
|
|
|
|
|
.thold_b(func_sl_thold_0_b),
|
|
|
|
|
.sg(sg_0),
|
|
|
|
|
.scin(siv[ex4_popcnt_sel_offset:ex4_popcnt_sel_offset + 3 - 1]),
|
|
|
|
|
.scout(sov[ex4_popcnt_sel_offset:ex4_popcnt_sel_offset + 3 - 1]),
|
|
|
|
|
.din(ex3_popcnt_sel_q),
|
|
|
|
|
.dout(ex4_popcnt_sel_q)
|
|
|
|
|
);
|
|
|
|
|
|
|
|
|
|
assign siv[0:scan_right-1] = {sov[1:scan_right-1], scan_in};
|
|
|
|
|
assign scan_out = sov[0];
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
endmodule
|
