LarsAsplund update

master
openpowerwtf 2 years ago
parent 82ea7bbccd
commit 883d6a0f67

@ -18,4 +18,8 @@ prj.add_library("top").add_source_files(_rel / "src" / "vhdl" / "work" / "*.vhdl
# Simulation only library containing VHDL mocks for Verilog UNIMACROs # Simulation only library containing VHDL mocks for Verilog UNIMACROs
prj.add_library("unimacro").add_source_files(_rel / "sim" / "unimacro" / "*.vhdl") prj.add_library("unimacro").add_source_files(_rel / "sim" / "unimacro" / "*.vhdl")


# The code isn't strictly compliant with the VHDL standard which causes some simulators
# to fail compilation. In GHDL these errors can be relaxed to warnings.
prj.set_compile_option("ghdl.a_flags", ["-frelaxed"])

prj.main() prj.main()

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