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---
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title: "Barreleye G2 and Zaius Motherboard Samples Showcased at the OpenPOWER Summit"
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date: "2018-05-14"
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categories:
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- "blogs"
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tags:
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- "google"
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- "rackspace"
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- "openpower-summit"
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- "barreleye"
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- "zaius"
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- "openpower-foundation"
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---
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By Adi Gangidi
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\[caption id="attachment\_5438" align="aligncenter" width="267"\][](https://openpowerfoundation.org/wp-content/uploads/2018/05/barreleye.jpg) Barreleye G2 Accelerator server\[/caption\]
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Rackspace showcased brand new Zaius PVT motherboard samples and Barreleye G2 servers at the [OpenPOWER Summit](https://opfus2018.sched.com/event/E36g/accelerators-development-update-zaius-barreleye-g2), demonstrating industry leading capabilities.
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## **Collaboration between Google and Rackspace**
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The Zaius/Barreleye G2 OpenPOWER platform was originally [announced](https://blog.rackspace.com/first-look-zaius-server-platform-google-rackspace-collaboration) at the OpenPOWER Summit in 2016 as a collaborative effort between Google and Rackspace. Since then, we have made steady progress on the development of this platform. We’ve navigated through engineering validation and test (EVT), design validation and test (DVT) and made various optimizations to the design resulting in refined solution.
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We continue to [qualify](https://blog.rackspace.com/zaius-barreleye-g2-server-development-update-2) various OpenCAPI/NVLink 2.0 adapters and play with frameworks ([SNAP](https://github.com/open-power/snap)/[PowerAI](https://www.ibm.com/us-en/marketplace/deep-learning-platform)) that enable easy adoption of these adapters.
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## **Zaius motherboard**
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Our Zaius motherboard has just entered the production validation and test stage, which reflects our confidence in this design and our continued effort to bring OpenCAPI/NVLink 2.0/PCIe Gen4 accelerators to datacenters via this server housing IBM Power9 processors.
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\[caption id="attachment\_5439" align="aligncenter" width="625"\][](https://openpowerfoundation.org/wp-content/uploads/2018/05/PVT.png) PVT Zaius Motherboard\[/caption\]
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## **CPU-GPU NVLink 2.0 Interposer Board**
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Also at the OpenPOWER Summit, Rackspace displayed our unique, disaggregated implementation of CPU-GPU NVLink 2.0 interposer board. This board is ideal for artificial intelligence and deep learning applications.
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Further, when combined with PCIe Gen4, we believe the Interposer Board will provide reference in the server industry for solving two bottlenecks:
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1. The slow CPU-GPU link
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2. Slow server-to-server network speed
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Both bottlenecks are commonplace today in PCIe Gen3 servers.
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\[caption id="attachment\_5440" align="aligncenter" width="625"\][](https://openpowerfoundation.org/wp-content/uploads/2018/05/SlimSAS.jpg) SlimSAS – to – SXM2 Interposer for support Volta GPU and FPGA HBM2 Card\[/caption\]
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Conference attendees also saw first-in-industry technology demos from Rackspace, including a demo of the world’s first production-ready PCIe Gen4 NVM Express System. You can read about that [here](https://openpowerfoundation.org/blogs/openpower-pcie/).
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Rackspace expects to do limited access customer betas later this year, based on Barreleye G2 Accelerator servers.
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Customers interested in participating, please reach out by emailing [hardware-engineering@lists.rackspace.com](mailto:hardware-engineering@lists.rackspace.com).
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