sandy89
/
openpower.foundation_sw_dev
forked from website/openpower.foundation
2
1
Fork 0
Code Issues Pull Requests 1 Projects Releases Wiki Activity
You cannot select more than 25 topics Topics must start with a letter or number, can include dashes ('-') and can be up to 35 characters long.
master
mendyf-patch-1
jamesk-patch-19
jamesk-patch-18
jamesk-patch-17
jamesk-patch-16
jamesk-patch-15
jamesk-patch-14
jamesk-patch-13
jamesk-patch-12
jamesk-patch-11
jamesk-patch-10
jamesk-patch-9
jamesk-patch-8
jamesk-patch-7
jamesk-patch-6
jamesk-patch-5
jamesk-patch-4
jamesk-patch-3
jamesk-patch-2
jamesk-patch-1
archetype-theme-transition
Branches Tags
${ item.name }
Create tag ${ searchTerm }
Create branch ${ searchTerm }
from '9640b055c2'
${ noResults }
openpower.foundation_sw_dev/content/resources/ibmpower9sforza.md

822 B
Raw Blame History

title link tags date draft
IBM POWER9 Sforza https://www-50.ibm.com/systems/power/openpower/tgcmDocumentRepository.xhtml?aliasId=POWER9_Sforza
processor
cpu
power9
2022-01-07 false

The IBM POWER9 Sforza is based on IBM® Power Architecture®, IBM POWER9 systems target technical computing segments by providing superior floating-point performance and off-chip floating-point acceleration. POWER9 systems, which consist of superscalar multiprocessors that are massively multithreaded, support Cloud operating environments. With the Coherent Accelerator Processor Interface (CAPI) attached, POWER9 systems offer a robust platform for analytics and big data applications.

The POWER9 Sforza module has the following key characteristics: 50 mm x 50 mm, FC-PLGA, 4 DDR4, 48 PCIe Lanes and 1 XBus 4B