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			39 lines
		
	
	
		
			1.9 KiB
		
	
	
	
		
			Markdown
		
	
---
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title: I/O Design Architecture Compliance Test Harness and Test Suite
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group: compliance
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publicreview: false
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tags:
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  - ioda
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  - power8
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  - power9
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date: 2020-11-10
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draft: false
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---
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This is the OpenPOWER I/O Design Architecture (IODA) Compliance Test Harness and Test Suite (TH/TS) specification.  
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The purpose of the OpenPOWER I/O Design Architecture (IODA) Compliance Test Harness and Test Suite (TH/TS) specification is
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to provide the test suite requirements to be able to demonstrate OpenPOWER I/O Design Architecture, compliance for POWER(TM) systems.
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It describes the tests required in the test suite and a test harness needed to execute the test suite.
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It also describes the successful execution of the test suite, including what it means for an optional feature to fail.  
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The input to this specification is the OpenPOWER I/O Design Architecture (IODA) Specification
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which describes the chip architecture for key aspects of PCI Express® (PCIe)-based host bridge (PHB) designs for POWER systems.
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This specification defines the PHB hardware and firmware requirements for these functions:
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1. MMIO Partitionable-Endpoint Number Determination,
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1. DMA and MSI Partitionable-Endpoint Number Determination,
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1. Partitionable-Endpoint State and Enhanced Error Handling,
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1. Error-Injection,
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1. DMA with No Page Migration,
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1. DMA with Page Migration,
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1. DMA with Multilevel TCE Tables,
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1. DMA Read Sync Register,
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1. Message-Signalled Interrupt,
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1. PCIe Configura- tion Space, and
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1. Partitionable-Endpoint State Table.
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This document is proposed as a Standard Track, Work Group Specification work product owned by the Compliance Workgroup and
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handled in compliance with the requirements outlined in the OpenPOWER Foundation Work Group (WG) Process document.
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Comments, questions, etc. can be submitted to the public mailing list for this document at openpower-ioda-thts@mailinglist.openpowerfoundation.org.
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