.gitignore

@@ -7,6 +7,7 @@
 
 # generated files by hugo
 /public/
+/builds/
 /resources/_gen/
 .hugo_build.lock
 hugo_stats.json

Makefile

@@ -1,19 +1,36 @@
 #!Makefile
 
 HUGO=hugo-extended
+HUGO_NUMWORKERMULTIPLIER=64
+HUGO_MEMORYLIMIT=32
+BUILDNAME:=$(shell git rev-parse --abbrev-ref HEAD)
+BASEURL:=$(shell basename `pwd` | sed 's/_/./g')
+BRANCHES:=$(shell git branch -r | sed 's/origin\///g' | sed 's/pr\//pr-/' | sed '/HEAD/d' | sed '/master/d' | sed '/main/d')
+BRANCHNAMES:=$(foreach branch,$(BRANCHES),$(branch))
 
 default all: build
 
 .PHONY: build
-build: clean
+build:
 	$(HUGO) --environment=production --minify --templateMetrics
 	@find public/ -name '*.html' ! -name '*.gz' -type f -exec sh -c "gzip -c -9 < {} > {}.gz" \;
 	@find public/ -name '*.css' ! -name '*.gz' -type f -exec sh -c "gzip -c -9 < {} > {}.gz" \;
 	@find public/ -name '*.js' ! -name '*.gz' -type f -exec sh -c "gzip -c -9 < {} > {}.gz" \;
 
+.PHONY: build-staging
+build-staging:
+	rm -rf builds/*
+	@for branch in $(BRANCHNAMES) ; do \
+		echo -e "Building branch \e[1;33m"$${branch}"\e[0m" ; \
+		git checkout $${branch} ; \
+		git pull ; \
+		$(HUGO) --environment=production --minify --templateMetrics --baseURL https://$(BASEURL)/$${branch}/ --destination builds/$${branch} ; \
+	done
+	@git checkout master
+
 .PHONY: test
 test: clean
-	$(HUGO) --environment=development --minify
+	HUGO_NUMWORKERMULTIPLIER=$(HUGO_NUMWORKERMULTIPLIER) HUGO_MEMORYLIMIT=$(HUGO_MEMORYLIMIT) $(HUGO) --environment=development --minify --printMemoryUsage --printPathWarnings --printUnusedTemplates --templateMetrics --templateMetricsHints
 
 .PHONY: draft
 draft:
@@ -25,13 +42,14 @@ debug:
 
 .PHONY: serve
 serve:
-	$(HUGO) server --environment=development --port 1314 --noHTTPCache --disableFastRender --watch
+	$(HUGO) server --environment=development --port 1314 --watch --noHTTPCache --disableFastRender
 
 .PHONY: servedraft
 servedraft:
-	$(HUGO) server --environment=development --buildFuture --buildExpired --noHTTPCache --disableFastRender --watch
+	$(HUGO) server --environment=development --port 1314 --watch --noHTTPCache --disableFastRender --buildDrafts --buildFuture --buildExpired
 
 .PHONY: clean
 clean:
 	@rm -rf public/
+	@rm -rf builds/
 	@rm -rf resources/

README.md

@@ -0,0 +1,24 @@
+# WEBSITE : OpenPOWER Foundation #
+
+This repository is the source that builds the static front public website of the OpenPOWER Foundation.
+
+- https://openpowerfoundation.org/
+- https://openpower.foundation/
+
+## Static Site ##
+
+This repository is the source used by [HugoCMS](https://gohugo.io/) to build the OpenPOWER public facing website.  
+
+## License ##
+
+This repository has multiple open source licenses, all permissive.  
+Any logos, images, trademarks, specifications are property of their respective owners.  
+The OpenPOWER Foundation has registered trademarks and uses trademarks.
+For a list of trademarks of the OpenPOWER Foundation, please see our Trademark and Logo Usage Guidelines.  
+
+- assets : [Creative Commons CC-BY-4.0](assets/LICENSE) License
+- config : [Apache Version 2.0](config/LICENSE) License
+- content : [Creative Commons CC-BY-4.0](content/LICENSE) License
+- data : [Creative Commons CC-BY-4.0](content/LICENSE) License
+- static : [Creative Commons CC-BY-4.0](static/LICENSE) License
+- themes : [Apache Version 2.0](theme/LICENSE) License

assets/LICENSE

@@ -0,0 +1,395 @@
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config/LICENSE

@@ -0,0 +1,202 @@
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+
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+
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+
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+
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+   WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+   See the License for the specific language governing permissions and
+   limitations under the License.

config/_default/config.toml

@@ -2,7 +2,10 @@
 title = "OpenPOWER Foundation"
 baseURL = "https://openpower.foundation/"
 theme = "openpowerfoundation"
-languageCode = "en-us"
+#languageCode = "opf"
+#defaultContentLanguage = "opf"
+#defaultContentLanguageInSubdir = true
+#enableMissingTranslationPlaceholders = true
 dataDir = "data"
 assetDir = "assets"
 PaginatePath = ""
@@ -12,29 +15,54 @@ pygmentsUseClasses = true
 enableGitInfo = true
 enableRobotsTXT = true
 disableHugoGeneratorInject = false
+enableInlineShortcodes = true
 enableEmoji = true
 
 [build]
 	noJSConfigInAssets = false
 #	useResourceCacheWhen = 'always'
 	writeStats = true
+	[build.buildStats]
+		enable = true
+		disableClasses = false
+		disableIDs = false
+		disableTags = false
+	[[build.cacheBusters]]
+		source = '(postcss|tailwind)\.config\.js'
+		target = '(css|styles|scss|sass)'
 
 [outputs]
-	home = [ "HTML" , "JSON" , "RSS" ]
-	section = [ "HTML", "JSON", "RSS" ]
-	page = [ "HTML" , "JSON" ]
+	home = [ "HTML" , "RSS" ]
+	section = [ "HTML", "RSS" ]
+	page = [ "HTML" , "RSS" , "JSON" , "LDIF" ]
+	taxanomy = [ "HTML" , "JSON" , "RSS" ]
+#	term = [ "HTML" , "JSON" ]
 
 [outputFormats]
 [outputFormats.RSS]
 	mediatype = "application/rss"
 	baseName = "feed"
 	suffix = "xml"
+	isPlainText = false
+	notAlternative = false
 [outputFormats.JSON]
 	mediaType = "application/json"
 	baseName = "index"
-	isPlainText = true
+	suffix = "json"
+	isPlainText = false
+	notAlternative = true
+[outputFormats.LDIF]
+	name = "ldif"
+	mediaType = "text/ldif"
+	baseName = "index"
+	suffix = "ldif"
+	isPlainText = false
 	notAlternative = true
 
+[mediaTypes]
+[mediaTypes."text/ldif"]
+	suffixes = [ "ldif" ]
+
 [markup]
 [markup.goldmark]
 [markup.goldmark.extensions]
@@ -93,7 +121,7 @@ enableEmoji = true
 	disableJSON = false
 	disableSVG = false
 	disableXML = false
-	minifyOutput = false
+	minifyOutput = true
 [minify.tdewolff]
 [minify.tdewolff.html]
 	keepComments = false
@@ -121,20 +149,20 @@ enableEmoji = true
 [caches]
 [caches.assets]
 	dir = ':resourceDir/_gen'
-	maxAge = "5m"
+	maxAge = -1
 [caches.getcsv]
 	dir = ':cacheDir/:project'
-	maxAge = "5m"
+	maxAge = -1
 [caches.getjson]
-	 dir = ':cacheDir/:project'
-	maxAge = "5m"
+	dir = ':cacheDir/:project'
+	maxAge = -1
 	ttl = 300
 [caches.getresource]
 	dir = ':cacheDir/:project'
-	maxAge = "5m"
+	maxAge = -1
 [caches.images]
 	dir = ':resourceDir/_gen'
-	maxAge ="5m"
+	maxAge = -1
 [caches.modules]
 	dir = ':cacheDir/modules'
-	maxAge = "5m"
+	maxAge = -1

config/_default/menus.toml

@@ -82,6 +82,10 @@
 	identifier = "resources"
 	url = "/resources/"
 	weight= -600
+[[navbar]]
+	name = "Blog"
+	weight = -100
+	url = "/blog/"
 [[navbar]]
 	name = "Contact Us"
 	url = "/contact/"
@@ -111,7 +115,7 @@
 
 ### governance
 [[governance]]
-	name = "Certificate of Incorperation"
+	name = "Certificate of Incorporation"
 	url = "https://files.openpower.foundation/s/xAkXWTxTxRqTeaM"
 	pre = "far fa-file-pdf"
 	#post = "fas fa-external-link-alt"
@@ -152,7 +156,7 @@
 [[discuss]]
 	name = "Discuss"
 	pre = "fas fa-comments"
-	url = "https://discuss.openpower.foundation/auth/oidc"
+	url = "https://discuss.openpower.foundation/categories"
 [[discuss]]
 	name = "Chat"
 	pre = "fas fa-comment-dots"
@@ -160,7 +164,7 @@
 [[discuss]]
 	name = "Slack"
 	pre = "fab fa-slack"
-	url = "https://openpowerfoundation.slack.com"
+	url = "https://join.slack.com/t/openpowerfoundation/shared_invite/zt-9l4fabj6-C55eMvBqAPTbzlDS1b7bzQ"
 
 ### social
 [[social]]
@@ -183,3 +187,8 @@
 	pre = "fab fa-youtube"
 	url = "https://www.youtube.com/channel/UCNVcHm09eXVbvUzZkQs0_Sg"
 	weight = -1700
+[[social]]
+	name = "WeChat"
+	pre = "fab fa-weixin"
+	url = "http://weixin.qq.com/r/2DrD20PEWx4krQe492-K"
+	weight = -1600

config/development/params.toml

@@ -1,7 +1,11 @@
 #!parms.toml
 [forms.contact]
-	URI = "http://localhost:8080/forms/contactus/test/opf"
+	URI = "http://localhost:8080/forms/contactus/opf"
 [forms.hub]
-	URI = "http://localhost:8080/forms/hub/test/opf"
+	URI = "http://localhost:8080/forms/hub/opf"
+[forms.isarfc]
+	URI = "http://localhost:8080/forms/isarfc/opf"
 [forms.passport]
-	URI = "http://localhost:8080/forms/passport/test/opf"
+	URI = "http://localhost:8080/forms/passport/opf"
+[forms.mailmonk]
+	URI = "http://localhost:9000/subscription/form"

config/production/params.toml

@@ -3,8 +3,12 @@
 	URI = "stats.vantosh.com"
 	ID = "69"
 [forms.contact]
-	URI = "https://webscripts.vantosh.com/forms/contactus/prod/opfm"
+	URI = "https://webscripts.vantosh.com/forms/contactus/opf"
 [forms.hub]
-	URI = "https://webscripts.vantosh.com/forms/hub/prod/opf"
+	URI = "https://webscripts.vantosh.com/forms/hub/opf"
+[forms.isarfc]
+	URI = "https://webscripts.vantosh.com/forms/isarfc/opf"
 [forms.passport]
-	URI = "https://webscripts.vantosh.com/forms/passport/prod/opf"
+	URI = "https://webscripts.vantosh.com/forms/passport/opf"
+[forms.mailmonk]
+	URI = "https://mailing.openpower.foundation/subscription/form"

content/404.md

@@ -0,0 +1,5 @@
+---
+title: 404 Page not Found
+date: 2022-02-19
+draft: false
+---

content/LICENSE

@@ -0,0 +1,395 @@
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content/_index.md

@@ -9,6 +9,8 @@ promo:
   calltoaction:
     - title: Join us
       link: /join/
+    - title: Getting Started
+      link: /guide/gettingstarted/
   image: promobg.png
 articles:
   - header: Open Innovation
@@ -39,13 +41,13 @@ sections:
   section:
     - title: Software
       image: software.jpg
-      link: /tags/software
+#      link: /tags/software
     - title: Silicon
       image: silicon.jpg
-      link: /tags/silicon
+#      link: /tags/silicon
     - title: Systems
       image: systems.jpg
-      link: /tags/systems
+#      link: /tags/systems
   buttons:
     - title: Working Groups
       link: /groups/

content/about/_index.md

@@ -1,6 +1,7 @@
 ---
 title: "About"
-navbar: about
+aliases:
+  - "/about-us/"
 date: 2021-03-03
 draft: false
 ---

content/blog/1303-2.md

@@ -0,0 +1,30 @@
+---
+title: "Changing the Game: Accelerating Applications and Improving Performance For Greater Data Center Efficiency"
+date: "2015-01-16"
+categories: 
+  - "blogs"
+---
+
+### Abstract
+
+Planning for exascale, accelerating time to discovery and extracting results from massive data sets requires organizations to continually seek faster and more efficient solutions to provision I/O and accelerate applications.  New burst buffer technologies are being introduced to address the long-standing challenges associated with the overprovisioning of storage by decoupling I/O performance from capacity. Some of these solutions allow large datasets to be moved out of HDD storage and into memory quickly and efficiently. Then, data can be moved back to HDD storage once processing is complete much more efficiently with unique algorithms that align small and large writes into streams, thus enabling users to implement the largest, most economical HDDs to hold capacity.
+
+This type of approach can significantly reduce power consumption, increase data center density and lower system cost. It can also boost data center efficiency by reducing hardware, power, floor space and the number of components to manage and maintain. Providing massive application acceleration can also greatly increase compute ROI by returning wasted processing cycles to compute that were previously managing storage activities or waiting for I/O from spinning disk.
+
+This session will explain how the latest burst buffer cache and I/O accelerator applications can enable organizations to separate the provisioning of peak and sustained performance requirements with up to 70 percent greater operational efficiency and cost savings than utilizing exclusively disk-based parallel file systems via a non-vendor-captive software-based approach.
+
+### Speaker Bio
+
+[Jeff Sisilli](https://www.linkedin.com/profile/view?id=5907154&authType=NAME_SEARCH&authToken=pSpl&locale=en_US&srchid=32272301421438011111&srchindex=1&srchtotal=1&trk=vsrp_people_res_name&trkInfo=VSRPsearchId%3A32272301421438011111%2CVSRPtargetId%3A5907154%2CVSRPcmpt%3Aprimary), senior director of product marketing at DataDirect Networks, has over 12 years experience creating and driving enterprise hardware, software and professional services offerings and effectively bringing them to market. Jeff is often quoted in storage industry publications for his expertise in software-defined storage and moving beyond traditional approaches to decouple performance from capacity.
+
+### Speaker Organization
+
+DataDirect Networks
+
+### Presentation
+
+<iframe src="https://openpowerfoundation.org/wp-content/uploads/2015/03/Sisilli_OPFS2015_031815.pdf" width="100%" height="450" frameborder="0"></iframe>
+
+ [Download Presentation](https://openpowerfoundation.org/wp-content/uploads/2015/03/Sisilli_OPFS2015_031815.pdf)
+
+[Back to Summit Details](javascript:history.back())

content/blog/2018-openpower-capi-and-opencapi-heterogeneous-computing-design-contest.md

@@ -0,0 +1,91 @@
+---
+title: "2018 OpenPOWER/CAPI and OpenCAPI Heterogeneous Computing Design Contest"
+date: "2018-07-27"
+categories: 
+  - "press-releases"
+  - "blogs"
+---
+
+\[vc\_row css\_animation="" row\_type="row" use\_row\_as\_full\_screen\_section="no" type="full\_width" angled\_section="no" text\_align="left" background\_image\_as\_pattern="without\_pattern"\]\[vc\_column\]\[vc\_column\_text css=".vc\_custom\_1538078932412{margin-bottom: 20px !important;}"\]
+
+# Build Your Own Super Processor
+
+\[/vc\_column\_text\]\[vc\_column\_text\]Organized by IBM China, IPS (Inspur Power Commercial Systems), The OpenPOWER Foundation, the OpenCAPI Consortium and Fudan University Microelectronics College, 2018 CAPI/OpenCAPI heterogeneous computing design contest begins July 6th.
+
+The objective of the contest is to encourage universities and scientific research institutions to understand the advanced technology of FPGA heterogeneous computing on the OpenPOWER system and prepare applications for technological innovation. The participants will have the opportunity to cooperate with members of the OpenPOWER Foundation, the OpenCAPI Consortium to develop  prototypes on a OpenPOWER platform while receiving technical guidance from from sponsor companies experts.
+
+The contest is sponsored by OpenPOWER Foundation members Shenzhen Semptian data Limited., Mellanox Technologies, Nallatech (a Molex company) and Xilinx, Inc,\[/vc\_column\_text\]\[vc\_column\_text css=".vc\_custom\_1538077233210{margin-top: 20px !important;}"\]
+
+## Background
+
+Heterogeneous Computing is a system that uses more than one processor. This multi-core system not only enhances the performance of the processor core, but also incorporates specialized processing capabilities, such as GPU or FPGA, to work on specific tasks.
+
+In recent years, as the silicon chip approaches physical and economic cost limits, Moore’s law is dead.  The rapid development of the Internet, the explosive growth of information and the popularization of AI technology have highly increased the demand for computing power. Heterogeneous computing, the focus is not only limited to the improvement of CPU performance, but to break the bottleneck of data transmission between CPU and peripherals, and to allow more hardware devices to participate in computing, such as using dedicated hardware to be responsible for intensive computing or peripherals management, which can significantly improve the performance of the whole system. There is no doubt that heterogeneous computing is the main direction of improving computing power.
+
+Participants in the OpenCAPI heterogeneous computing design competition can achieve insight by utilizing and optimizing the most advanced technology available through OpenPOWER architecture. This competition will provide an opportunity to create breakthrough technologies and for enterprise and research workloads.\[/vc\_column\_text\]\[vc\_column\_text css=".vc\_custom\_1538077241426{margin-top: 20px !important;}"\]
+
+## Contest Rules
+
+The contest will begin on July 6th with submissions due by Nov. 23rd.   The winner will be announced publically at the OpenPOWER China Summit 2018 in December in Beijing.  Announcement date yet to be determined
+
+In preliminaries, participants will submit a solution proposal of a FPGA accelerator based on CAPI/OpenCAPI technology on OpenPOWER systems. The accelerator can serve any workload that requires high computing power or big data transaction bandwidth.  Ten winners of preliminaries will be selected and awarded funds to support them moving on to the final.
+
+In final, participants will develop a prototype of their solution proposed in real development environment. Sponsors will provide them with OpenPOWER systems + CAPI/OpenCAPI enabled FPGA cards as well as technical expects that will provide coding and debugging skills for the CAPI development framework.\[/vc\_column\_text\]\[vc\_column\_text css=".vc\_custom\_1538077250723{margin-top: 20px !important;}"\]
+
+## Timeline
+
+\[/vc\_column\_text\]\[vc\_row\_inner row\_type="row" type="full\_width" text\_align="left" css\_animation="" css=".vc\_custom\_1538077211372{margin-top: 20px !important;background-color: #007aad !important;}"\]\[vc\_column\_inner width="1/5"\]\[vc\_column\_text\]
+
+### Schedule
+
+\[/vc\_column\_text\]\[/vc\_column\_inner\]\[vc\_column\_inner width="1/5"\]\[vc\_column\_text\]
+
+### Time
+
+\[/vc\_column\_text\]\[/vc\_column\_inner\]\[vc\_column\_inner width="3/5"\]\[vc\_column\_text\]
+
+### Content
+
+\[/vc\_column\_text\]\[/vc\_column\_inner\]\[/vc\_row\_inner\]\[vc\_row\_inner row\_type="row" type="full\_width" text\_align="left" css\_animation=""\]\[vc\_column\_inner width="1/5"\]\[vc\_column\_text\]
+
+#### Preliminary
+
+\[/vc\_column\_text\]\[/vc\_column\_inner\]\[vc\_column\_inner width="1/5"\]\[vc\_column\_text\]7/6-8/15\[/vc\_column\_text\]\[/vc\_column\_inner\]\[vc\_column\_inner width="3/5"\]\[vc\_column\_text\]Enroll and submit proposal\[/vc\_column\_text\]\[/vc\_column\_inner\]\[/vc\_row\_inner\]\[vc\_row\_inner row\_type="row" type="full\_width" text\_align="left" css\_animation=""\]\[vc\_column\_inner width="1/5"\]\[/vc\_column\_inner\]\[vc\_column\_inner width="1/5"\]\[vc\_column\_text\]8/16-8/26\[/vc\_column\_text\]\[/vc\_column\_inner\]\[vc\_column\_inner width="3/5"\]\[vc\_column\_text\]Expert Review\[/vc\_column\_text\]\[/vc\_column\_inner\]\[/vc\_row\_inner\]\[vc\_row\_inner row\_type="row" type="full\_width" text\_align="left" css\_animation="" css=".vc\_custom\_1538076119836{padding-bottom: 1px !important;}"\]\[vc\_column\_inner width="1/5"\]\[/vc\_column\_inner\]\[vc\_column\_inner width="1/5"\]\[vc\_column\_text\]8/27\[/vc\_column\_text\]\[/vc\_column\_inner\]\[vc\_column\_inner width="3/5"\]\[vc\_column\_text\]Announce Top 10 for Final\[/vc\_column\_text\]\[/vc\_column\_inner\]\[/vc\_row\_inner\]\[vc\_row\_inner row\_type="row" type="full\_width" text\_align="left" css\_animation=""\]\[vc\_column\_inner width="1/5"\]\[vc\_column\_text\]
+
+#### Final
+
+\[/vc\_column\_text\]\[/vc\_column\_inner\]\[vc\_column\_inner width="1/5"\]\[vc\_column\_text\]8/27-11/23\[/vc\_column\_text\]\[/vc\_column\_inner\]\[vc\_column\_inner width="3/5"\]\[vc\_column\_text\]Prototype development and submission for final\[/vc\_column\_text\]\[/vc\_column\_inner\]\[/vc\_row\_inner\]\[vc\_row\_inner row\_type="row" type="full\_width" text\_align="left" css\_animation=""\]\[vc\_column\_inner width="1/5"\]\[/vc\_column\_inner\]\[vc\_column\_inner width="1/5"\]\[vc\_column\_text\]11/24-11/29\[/vc\_column\_text\]\[/vc\_column\_inner\]\[vc\_column\_inner width="3/5"\]\[vc\_column\_text\]Expert Review\[/vc\_column\_text\]\[/vc\_column\_inner\]\[/vc\_row\_inner\]\[vc\_row\_inner row\_type="row" type="full\_width" text\_align="left" css\_animation="" css=".vc\_custom\_1538076138264{padding-bottom: 2px !important;}"\]\[vc\_column\_inner width="1/5"\]\[/vc\_column\_inner\]\[vc\_column\_inner width="1/5"\]\[vc\_column\_text\](TBD)\[/vc\_column\_text\]\[/vc\_column\_inner\]\[vc\_column\_inner width="3/5"\]\[vc\_column\_text\]Final Thesis Oral Defense and Award Ceremony\[/vc\_column\_text\]\[/vc\_column\_inner\]\[/vc\_row\_inner\]\[vc\_row\_inner row\_type="row" type="full\_width" text\_align="left" css\_animation="" css=".vc\_custom\_1538077273553{margin-top: 20px !important;}"\]\[vc\_column\_inner\]\[vc\_column\_text\]
+
+## Audiences and Enroll
+
+College students from China universities and research institutes, who are interested in the CAPI/OpenCAPI technology are welcome to join.  They are also welcome to join the OpenPOWER Foundation at the Associate or Academic Level for free ([https://openpowerfoundation.org/membership-2/levels/](http://openpowerforum.wpengine.com/membership-2/levels/))
+
+Click [More information](https://mp.weixin.qq.com/s?__biz=MjM5MDk3Mjk0MQ==&mid=509982703&idx=1&sn=48ee68fbdd54b1437e78a1d9c2285864&chksm=3d2dba8d0a5a339baf271ed5cedf51d8f29c097e488244623bac2d6f61121c3292fc45de56a4&scene=18&key=1d3ba184c3454c150135581fb2c6d4fd1a55a420799f8) to get to know more of the contest.
+
+Click [Enroll](http://dsgapp.cn.edst.ibm.com/bps/OpenCAPI/index.html?lectureId=1&project_id=2) for enrollment\[/vc\_column\_text\]\[/vc\_column\_inner\]\[/vc\_row\_inner\]\[/vc\_column\]\[/vc\_row\]\[vc\_row css\_animation="" row\_type="row" use\_row\_as\_full\_screen\_section="no" type="full\_width" angled\_section="no" text\_align="left" background\_image\_as\_pattern="without\_pattern" css=".vc\_custom\_1538077266597{margin-top: 20px !important;}" z\_index=""\]\[vc\_column\]\[vc\_column\_text\]
+
+## Messages from Organizers and Sponsors
+
+\[/vc\_column\_text\]\[vc\_row\_inner row\_type="row" type="full\_width" text\_align="left" css\_animation="" css=".vc\_custom\_1538077331586{margin-top: 16px !important;}"\]\[vc\_column\_inner width="1/6"\]\[vc\_single\_image image="5636" img\_size="full" qode\_css\_animation=""\]\[vc\_column\_text css=".vc\_custom\_1538076393779{margin-top: 16px !important;}"\]Waiming Wu, General Manager, IBM OpenPOWER China\[/vc\_column\_text\]\[/vc\_column\_inner\]\[vc\_column\_inner width="5/6"\]\[vc\_column\_text\]With the ever increasing demand for computing power today, OpenPOWER based on IBM POWER processor and Linux technology has attracted more and more attention from customers, developers and business partners. OpenPOWER systems, with its excellent computing and processing capabilities are ideal for AI, big data and cloud platforms. The OpenCAPI technology used in OpenPOWER systems support heterogeneous computing such that innovation in accelerators could be quickly integrated with POWER processor to provide the next level of computing performance. The new concept of heterogeneous computing based on collaboration between CPU and accelerators heralds a new computing era.
+
+We are pleased to see the announcement and roll out of “The OpenCAPI + OpenPOWER Heterogeneous Computing Contest” for universities and research institutions. The OpenPOWER Foundation & OpenCAPI Consortium, Fudan University and many members of OpenPOWER actively support this activity. This is the best demonstration of the support from academic and corporate community in technological innovation. In IBM we will also do our best to co-organize this event and to contribute developing talents and innovative solutions.
+
+We are also grateful to the technical experts at IBM China System Lab. Under this Contest, they will share the leading technology to the competing teams through in-depth technology seminars, carefully prepared technical documents and the upcoming one-to-one expert support, and of course great technical mentorship.\[/vc\_column\_text\]\[/vc\_column\_inner\]\[/vc\_row\_inner\]\[vc\_separator type="normal" thickness="1" up="16" down="16"\]\[vc\_row\_inner row\_type="row" type="full\_width" text\_align="left" css\_animation=""\]\[vc\_column\_inner width="1/6"\]\[vc\_single\_image image="5637" img\_size="full" qode\_css\_animation=""\]\[vc\_column\_text css=".vc\_custom\_1538076518297{margin-top: 16px !important;}"\]Hugh Blemings, Executive Director, OpenPOWER Foundation\[/vc\_column\_text\]\[/vc\_column\_inner\]\[vc\_column\_inner width="5/6"\]\[vc\_column\_text\]At the OpenPOWER Foundation we’re delighted to see our members like Mellanox, Nallatech, Semptian, Xilinx and of course IBM working together in the “OpenCAPI + OpenPOWER Contest”. CAPI/OpenCAPI is a key part of the great Open system that OpenPOWER represents and a leading high speed interconnect for Accelerators and Interconnects alike.
+
+Our Members, working with some great universities and research institutions in China will provide both an opportunity for people to learn about CAPI/OpenCAPI and to see solutions to real world problems solved faster using innovative OpenPOWER hardware and software.
+
+We’re looking forward to seeing what innovative ideas the contestants come up with and, of course, congratulating the winners at the OpenPOWER Summit in Beijing in December. We wish all involved the very best!\[/vc\_column\_text\]\[/vc\_column\_inner\]\[/vc\_row\_inner\]\[vc\_separator type="normal" thickness="1" up="16" down="16"\]\[vc\_row\_inner row\_type="row" type="full\_width" text\_align="left" css\_animation=""\]\[vc\_column\_inner width="1/6"\]\[vc\_single\_image image="5639" img\_size="full" qode\_css\_animation=""\]\[vc\_column\_text css=".vc\_custom\_1538076676628{margin-top: 16px !important;}"\]Yujing Jiang, Product and Marketing Director, Inspur Power Commercial Systems Co., Ltd\[/vc\_column\_text\]\[/vc\_column\_inner\]\[vc\_column\_inner width="5/6"\]\[vc\_column\_text\]Inspur Power Commercial Systems Co., Ltd. is a platinum member of the OpenPOWER Foundation, committed to co-build an open OpenPOWER ecosystem, developing servers based on open Power technology, improving server ecosystems, building a sustainable server business and providing users with advanced, differentiated and diverse computing platforms and solutions. Inspur Power Systems insist on openness and integration for continuous development of heterogeneous computing architecture based on CAPI. CAPI heterogeneous computing breaks the ‘computing walls’, enhances massive parallel data processing capabilities and provides more effective and powerful data resources for image and video, deep learning and database. CAPI heterogeneous computing also provides extremely high data transmission bandwidth, defines a more flexible data storage method, and greatly improves server IO capabilities.
+
+Inspur Power Systems will provide OpenPOWER based datacenter server FP5280G2 as the platform for the contest to verify and test the works. It is the first P9 platform in China, designed for cloud computing, big data, deep learning optimization. It is optimized in performance, extension and storage. The standalone FP5280G2 provides the leading PCIe Gen4 (16Gbps) channel in the industry, and supports CAPI 2.0. We wish this new system will bring an effective support to the contest. And in the future, we can build more systems to enhance heterogeneous computing with more interconnection through CAPI technology between CPU to memory, network, I/O device etc and be widely applied to industry market.\[/vc\_column\_text\]\[/vc\_column\_inner\]\[/vc\_row\_inner\]\[vc\_separator type="normal" thickness="1" up="16" down="16"\]\[vc\_row\_inner row\_type="row" type="full\_width" text\_align="left" css\_animation=""\]\[vc\_column\_inner width="1/6"\]\[vc\_single\_image image="5640" img\_size="full" qode\_css\_animation=""\]\[vc\_column\_text css=".vc\_custom\_1538076774108{margin-top: 16px !important;}"\]Yibo Fan, Associate Professor, Fudan University Microelectronics College, China\[/vc\_column\_text\]\[/vc\_column\_inner\]\[vc\_column\_inner width="5/6"\]\[vc\_column\_text\]CAPI/OpenCAPI is an unique technology in OpenPOWER system, which provides a superior operating environment for FPGA heterogeneous computing design, especially eliminating the driver development process and providing the most convenient method for rapid chip IP prototype verification and the deployment of heterogeneous systems. Based on CAPI technology, our team launched a CAPI running example of open source H.265 video encoder. Through the technical cooperation in the project, we fully realized the innovative value of CAPI technology for heterogeneous computing. Hopefully by hosting this contest, we can contact more excellent teams and talents who study and master CAPI technology in peer universities, and promote CAPI/OpenCAPI technology further to universities and industries.\[/vc\_column\_text\]\[/vc\_column\_inner\]\[/vc\_row\_inner\]\[vc\_separator type="normal" thickness="1" up="16" down="16"\]\[vc\_row\_inner row\_type="row" type="full\_width" text\_align="left" css\_animation=""\]\[vc\_column\_inner width="1/6"\]\[vc\_single\_image image="5641" img\_size="full" qode\_css\_animation=""\]\[vc\_column\_text css=".vc\_custom\_1538076852620{margin-top: 16px !important;}"\]Qingchun Song, Mellanox Technologies, Asia & Pacific Marketing Director\[/vc\_column\_text\]\[/vc\_column\_inner\]\[vc\_column\_inner width="5/6"\]\[vc\_column\_text\]As a member of OpenPOWER, Mellanox is pleased to be involved in the optimization of OpenCAPI. As a provider of intelligent end-to-end network products, Mellanox has always worked closely with x86 and POWER processor platforms. Mellanox intelligent network products has always been the best choice for the POWER platform.
+
+In June 2018, Summit Supercomputer from Oak Ridge National Laboratory, US, was released at the International Supercomputing Conference in Frankfurt, Germany, It use the POWER CPU plus Mellanox’s InfiniBand network and it is now the fastest supercomputer and artificial intelligence computer in the world.
+
+Mellanox network products currently support 100 GHz per second. Products with a speed of 200 GHz per end will be released into market in the next quarter. Better network speed requires the support of faster internal buses, and high speed OpenCAPI and 200G network products are an excellent match.
+
+I hope that this OpenCAPI optimization contest can efficiently improve the performance of CAPI, and can realize the integration with RDMA technology, which truly realize the matching of internal network buses and external buses and help the next-generation data center. Finally, I wish the contest going smoothly, thank you.\[/vc\_column\_text\]\[/vc\_column\_inner\]\[/vc\_row\_inner\]\[vc\_separator type="normal" thickness="1" up="16" down="16"\]\[vc\_row\_inner row\_type="row" type="full\_width" text\_align="left" css\_animation=""\]\[vc\_column\_inner width="1/6"\]\[vc\_single\_image image="5642" img\_size="full" qode\_css\_animation=""\]\[vc\_column\_text css=".vc\_custom\_1538076930931{margin-top: 16px !important;}"\]Hao Li, General Manager, Semptian Data Co., Ltd\[/vc\_column\_text\]\[/vc\_column\_inner\]\[vc\_column\_inner width="5/6"\]\[vc\_column\_text\]Many thanks to the organizers of the event for inviting Semptian to participate in 2018 OpenCAPI Heterogeneous Computing Design Contest. In recent years, the way of relying solely on CPU to improve computing performance has come to an end. At the same time, various applications, which are emerging rapidly, raise higher demand on computing ability and constantly challenge the performance limit. It has become a consensus in industry that through heterogeneous computing we can break the bottleneck of computing and data transmission.
+
+As a senior corporation which has more than ten years of experience in the field of FPGA developing, Semptian believes that with the help of FPGAs’ advantage of high performance, low power consumption, flexibility and ease of use, combined with the special technical advantage of CAPI technology in OpenPOWER systems, processing specific computing through FPGA + CAPI + CPU is the best way to optimize computing performance, reduce acquisition and operation costs and meet the requirements of applications and power consumptions.
+
+We are very glad to participate in this contest together with other members of the OpenPOWER alliance to expand the development of the alliance’s ecosystem. Hopefully through this contest, we can explore more application scenarios, like artificial intelligence inference, image and video acceleration and gene computing acceleration, to expand the application of heterogeneous computing.\[/vc\_column\_text\]\[/vc\_column\_inner\]\[/vc\_row\_inner\]\[vc\_separator type="normal" thickness="1" up="16" down="16"\]\[vc\_row\_inner row\_type="row" type="full\_width" text\_align="left" css\_animation=""\]\[vc\_column\_inner width="1/6"\]\[vc\_single\_image image="5643" img\_size="full" qode\_css\_animation=""\]\[vc\_column\_text css=".vc\_custom\_1538077009696{margin-top: 16px !important;}"\]Fan Kui, Account Sales Manager Nallatech\[/vc\_column\_text\]\[/vc\_column\_inner\]\[vc\_column\_inner width="5/6"\]\[vc\_column\_text\]Nallatech and IBM have worked closely through the OpenPOWER Foundation to enable heterogeneous computing by way of CAPI1.0 & CAPI2.0 based FPGA Accelerators. Nallatech’s 250S FPGA Accelerator supports CAPI1.0 and the 250S+ supports CAPI2.0. Additionally the OpenPOWER Accelerator Workgroups ”CAPI SNAP Acceleration Framework”, is also supported on these cards. CAPI SNAP eases the development of Accelerator Function Units, AFUs, within the FPGA in OpenPOWER systems. As you may very well know, FPGA computing is one of the leading technologies in the development of AI and Deep learning and is one of the most exciting advancements that will affect in how we live our lives.
+
+We are all proud to sponsor such an aspirational and academic event with students of China that will boast amazing innovations in FPGA technology for future generations to come. Thank you for the opportunity of sponsoring your event. We wish you great fortune in this contest, as well as your career in FPGA Acceleration.\[/vc\_column\_text\]\[/vc\_column\_inner\]\[/vc\_row\_inner\]\[/vc\_column\]\[/vc\_row\]\[vc\_row css\_animation="" row\_type="row" use\_row\_as\_full\_screen\_section="no" type="full\_width" angled\_section="no" text\_align="left" background\_image\_as\_pattern="without\_pattern"\]\[vc\_column\]\[vc\_empty\_space\]\[/vc\_column\]\[/vc\_row\]

content/blog/2019-openpower-opencapi-heterogeneous-computing-design-contest.md

@@ -0,0 +1,188 @@
+---
+title: "2019 OpenPOWER + OpenCAPI Heterogeneous Computing Design Contest"
+date: "2019-09-24"
+categories: 
+  - "blogs"
+tags: 
+  - "openpower"
+  - "openpower-foundation"
+  - "opencapi"
+  - "opencapi-contest"
+---
+
+After the success of the 2018 OpenPOWER/CAPI and OpenCAPI Heterogeneous Computing Design Contest, we're excited to see its return in 2019! Groups from research institutions or universities in China are welcome to apply. You can find more information on the contest from our OpenPOWER ecosystem friends in China below. Good luck to all of the participants!
+
+![](images/KV-English-1024x556.jpg)
+
+# 2019 OpenPOWER + OpenCAPI异构计算大赛
+
+人工智能、物联网、深度学习、人脸识别、无人驾驶……
+
+耳熟能详的词汇背后，隐藏着怎样的技术？
+
+丰富的应用、便捷的生活
+
+身处全民数字化时代的你，是否想过
+
+是什么在支持着我们？
+
+在这一切的背后都离不开大量提供强劲计算能力的服务器以及被日益关注的异构计算。
+
+在OpenPOWER服务器系统上实现异构计算，利用CAPI接口连接FPGA，设计硬件加速器，可以显著提升系统性能，
+
+打破计算和数据传输的瓶颈，降低机器的购置和运维成本，实现异构计算的各种可能。
+
+回顾2018 OpenPOWER/CAPI + OpenCAPI异构计算大赛，
+
+来自17所高校的27支代表队伍报名参加比赛！
+
+经过3个月的实际开发、调试、测试和调优，
+
+成功开发出基于CAPI/OpenCAPI的设计原型，实践异构计算。
+
+他们出色的学习及开发能力让我们相信他们可以逐渐成长为科技创新的中坚力量！
+
+而今年，
+
+打破藩篱，引领加速，
+
+你准备好了吗？
+
+## 大赛介绍
+
+2019 OpenPOWER + OpenCAPI异构计算大赛由OpenPOWER基金会、OpenCAPI联盟主办，IBM中国承办，浪潮商用机器有限公司协办，多家OpenPOWER基金会成员支持，旨在鼓励大学和科研机构了解和实践异构计算，利用OpenPOWER系统上FPGA异构计算的先进技术，开拓视野、积极创新、加速推动科技创新实际应用。
+
+ 
+
+参赛者将有机会与OpenPOWER基金会多家会员合作，在先进的OpenPOWER系统平台上实践开发，感受专业领域的开发环境和方法学，并获得企业导师一对一技术指导。获奖学生除了获取奖金之外，还有机会成为IBM的实习生以及工作优先录取的机会！
+
+ 
+
+另外OpenPOWER基金会也欢迎高校加入成为学术/协会成员（无入会费用，详见：[https://openpowerfoundation.org/membership/levels/](https://openpowerfoundation.org/membership/levels/)）。
+
+ 
+
+**长按扫码报名及提交您的初赛方案**
+
+（报名及方案提交开放时间：2019.9.24-2019.10.25）
+
+ 
+
+## 大赛主体单位
+
+【主办单位】
+
+OpenPOWER基金会
+
+OpenCAPI联盟
+
+【承办单位】
+
+IBM中国
+
+【协办单位】
+
+浪潮商用机器有限公司
+
+【合作单位】
+
+Alpha Data
+
+联捷科技（CT-Accel）
+
+北京迈络思科技有限公司（Mellanox）
+
+赛灵思电子科技（上海）有限公司（Xilinx）
+
+## 竞赛背景
+
+异构计算（Heterogeneous Computing）是指使用一种以上处理器的系统。这种多核心的系统不仅通过增加处理器内核提升性能，还纳入专门的处理能力，例如GPU或FPGA来应对特定的任务。
+
+近年来，随着硅芯片逼近物理和经济成本上的极限，摩尔定律已趋近失效。但与之相对的却是，互联网的蓬勃发展、信息量爆炸式增长以及AI技术研究和应用普及，都对计算能力的要求变的更高。而异构计算，将关注点不仅局限在CPU性能的提升，而是打破CPU和外围设备间数据传输的瓶颈，让更多的硬件设备参与计算，如用专用硬件完成密集计算或者外设管理等，从而显著提高系统性能。毫无疑问，异构计算是提高计算力的主流方向。
+
+参加OpenCAPI异构计算设计大赛，不仅可以了解当今处理器和系统硬件上最领先的技术，更可以成为把您的聪明才智孵化成某项突破性研究或应用的起点。
+
+## 竞赛对象
+
+参赛对象为国内任何对大赛有兴趣的大学或研究机构。大赛以学校为单位组织报名，比赛形式为团体赛。具体要求如下：
+
+- 每支队伍由一名以上学生及一位指导老师组成。指导老师是参赛队所属高校的正式教师，一位老师可以指导多支参赛队
+- 允许一个学校有多只代表队
+- 报名时应具备在校学籍
+- 参赛队员应保证报名信息准确有效
+
+## 竞赛奖励
+
+初赛入围的10支参赛队将进入复赛。复赛设立一、二、三等奖及鼓励奖。奖金如下（税前金额）：
+
+一等奖   1支团队  奖金人民币2.5万元
+
+二等奖   1支团队  奖金人民币2万元
+
+三等奖   1支团队  奖金人民币 1.5万元
+
+鼓励奖   进入复赛的其他7支队伍 奖金人民币5千元
+
+## 赛程和赛制
+
+本次竞赛分初赛和复赛两个阶段。初赛采用网上评审方式，复赛采用公开项目答辩的评审方式。 赛程安排如下：
+
+ 
+
+<table><tbody><tr><td width="88">赛程</td><td width="205">时间</td><td width="293">内容</td></tr><tr><td rowspan="3" width="88">初赛</td><td width="205">9/24-10/25</td><td width="293">初赛方案设计及提交</td></tr><tr><td width="205">10/26-11/06</td><td width="293">初赛专家评审</td></tr><tr><td width="205">11/07</td><td width="293">公布复赛入围的10支团队的名单</td></tr><tr><td rowspan="3" width="88">复赛</td><td width="205">11/08-03/06/2020</td><td width="293">复赛作品开发及提交</td></tr><tr><td width="205">03/07/2020-03/14/2020</td><td width="293">复赛专家评审</td></tr><tr><td width="205">03/18/2020</td><td width="293">复赛答辩及颁奖典礼</td></tr></tbody></table>
+
+ 
+
+ 
+
+**初赛：**参赛队选择可被加速的应用场景，构思系统设计。提出具有创新想法的设计方案。
+
+以下几类供参考，并无限制：
+
+- 解决计算能力瓶颈：大规模并行数据处理能力可以应用于神经网络，图像视频，密码学，网络安全，数据库、以及广泛领域中的数据计算（金融，地质，生物、材料、物理等）。
+- 解决数据传输瓶颈：超高的数据传输带宽可以应用于网络传输，定义更灵活的数据存储方式，并且利用FPGA在数据传输过程中顺便进行数据处理，极大地减轻服务器端的CPU压力。
+
+IBM资深专家指导参赛团队结合研究领域，选择应用场景。各团队构思系统设计，进行可行性分析，划分算法流程，软硬件分配，估算带宽，计算密度和效率。在这一阶段，只需以书面报告形式提交方案构想，即提交架构设计和性能预测分析报告。
+
+ 
+
+**复赛：**参赛队和IBM资深专家一起审阅系统设计，并进入具体开发阶段。
+
+ 
+
+- 开发环境为主办单位和合作单位提供，包括OpenPOWER服务器和支持CAPI接口的FPGA板卡搭建的远程环境。主要工作包括软件/硬件开发、调试、记录和分析测试结果。
+- 具体开发过程中，企业导师一对一辅导，协助参赛者把设计实现成原型。复赛作品要求以论文形式提交原型开发报告和分析测试结果。
+
+ 
+
+详细的提交内容以及方式，将在后续的竞赛过程中发布，以大赛主办方发布的最新内容为准。
+
+## 更多详情
+
+**CAPI和OpenCAPI**
+
+CAPI的全称是Coherent Acceleration Processor Interface，它是允许外部设备（I/O Device）和处理器CPU共享内存的接口技术。以FPGA为例，作为现场可编程门阵列硬件，它有令人惊叹的并行处理能力并完全可以自由定制，但它连在系统中时，仍然是个外部设备。它要参与到异构计算中，和CPU协同工作，不能共享内存怎么行呢？从技术上看，用CAPI接口连接FPGA作为异构计算平台有以下好处：
+
+- 它是带一致性的加速接口，FPGA可以直接像CPU一样直接访问内存。避免软硬件协同设计中的地址转换操作，大大简化编程思路，进而降低研发开销，缩短开发周期。
+- 主机端程序完全工作在用户态，无须编写PCIE设备驱动程序。
+- FPGA作为I/O设备，和主机通讯的延时更短。
+- 在FPGA处理能力增加的场景下，带宽瓶颈日益凸显。它是业内最领先的PCIE Gen4 (16Gbps) 和OpenCAPI (25Gbps) 通道，妥妥的大带宽！
+- OpenCAPI还支持I/O通道的内存扩展，由此探索存储级内存（SCM）对大数据应用的加速。
+
+OpenCAPI是独立的标准化组织（[www.opencapi.org](http://www.opencapi.org)），它将新一代CAPI技术规范开放出来，致力于推动高速硬件接口设计全面进入带内存一致性的时代，顺应异构计算的潮流，并为之提供了坚实的技术支撑。OpenCAPI首先在Power9发布，搭载Power9和OpenPOWER9服务器，但它的设计特性并没有绑定在Power架构上，完全可以嵌入其它种类的处理器架构。
+
+ 
+
+**Power Systems和OpenPOWER**
+
+ 
+
+在全球众多最大型的集群中，都能看到 Power Systems 高性能计算服务器的身影。Power Enterprise 服务器专为数据设计，可为企业实现终极的弹性、可用性、安全性等性能，被广泛应用于银行、政府、航空、能源等企业的核心业务中，为要求苛刻的工作负载（例如，基因、金融、计算化学、石油和天然气勘探以及高性能数据分析）提供极致。
+
+ 
+
+2013年IBM开放Power服务器架构，成立OpenPOWER基金会(https://openpowerfoundation.org/)，目前已经有来自34个国家和地区的340多家公司加入，核心会员有IBM、Google、Nvidia、Redhat、Canonical（Ubuntu）、Hitachi、浪潮、Wistron等，共同建设开放的OpenPOWER生态。对比传统Power系统，基于 Linux 的OpenPOWER系统主要由联盟成员设计生产，价格优势明显，同时也能够实现出色的性能和投资回报率，适用于计算密集型和数据密集型应用。这些服务器提供您所需的灵活性，能够快速集成创新技术解决方案，避免被供应商的专有技术所“套牢”，并加速实现业务结果。
+
+ 
+
+2018年初，IBM 宣布推出POWER9处理器。全新POWER9芯片为计算密集型人工智能工作负载而设计，是首批嵌入PCI-Express 4.0、新一代NVIDIA NVLink及OpenCAPI的处理器，基于该处理器的系统可以大幅提升Chainer、TensorFlow及Caffe等各大人工智能框架的性能，并加速Kinetica等数据库。提供超越过往所有设计的高速信号总线带宽。如此一来，数据科学家能够实现以更快的速度构建包括科研范畴的深度学习洞察、实时欺诈检测和信用风险分析等范围的应用。POWER9是美国能源部Summit及Sierra超级计算机的核心，这两台超级计算机是当今世界上性能最强的数据密集型超级计算机。

content/blog/21unity-joins-openpowerfoundation.md

@@ -0,0 +1,45 @@
+---
+title: 21unity Joins OpenPOWER Foundation
+categories:
+  - blogs
+tags:
+  - openpower
+  - openpower-foundation
+  - linux-foundation
+  - open-source
+  - cloud
+  - open-source-hardware
+  - member
+date: 2022-04-06
+draft: false
+---
+
+Today, we are pleased to announce that 21unity, a cloud service provider based in Dieburg, Germany,
+has joined the OpenPOWER Foundation as a Silver member.  
+
+The OpenPOWER Foundation is committed to an open, community-driven technology development process,
+which is critical to the continued growth of open collaboration around the POWER architecture.  
+
+"_OpenPOWER Foundation is pleased to welcome 21unity to the foundation and our community, and look forward
+to our collaboration in community-driven open development that broadens customer computing choice_",
+said [James Kulina](https://www.linkedin.com/in/james-kulina/), Executive Director, OpenPOWER Foundation.  
+
+21unity has built and released its own collaborative cloud platform called 21unity Collaboration Cloud.
+It features an out of the box and always available Nextcloud Enterprise (files, chat / video, agile boards, mail, contacts, calendar)
+and also includes an ERP system called 21pro.  
+
+"_21unity presents itself as a solution finder, developer and treasure hunter.
+We thrive on making our customers happy by matching their needs with unexpected and simple solutions, operated in our own data centers.
+Our portfolio includes services and infrastructure solutions such as compute units (HPC clusters), storage, databases, OpenStack,
+container solutions based on Kubernetes as well as new technologies in Machine Learning, Artificial Intelligence, Big Data and
+Internet of Things based on OpenPOWER_", said [Anja Gondolf](https://www.linkedin.com/in/anja-gondolf-1396a968/), CEO and Founder.  
+
+"_OpenPOWER helps us tackle typical challenges like scalability, high availability and stability of our infrastructure.
+We've joined the OpenPOWER foundation, because 21unity's Cloud is built on OpenPOWER architecture and
+we believe in the benefits of open solutions and the communities building them_",
+says [Christopher Branston](https://www.linkedin.com/in/christopher-branston-a1903142/), Head of Marketing.  
+
+The OpenPOWER Foundation looks forward to collaborating with 21unity,
+in developing new and exciting POWER based solutions through open standards and community driven collaboration.  
+
+Learn more about [21unity](https://21unity.de).  

content/blog/_index.md

@@ -0,0 +1,9 @@
+---
+title: Blogs
+outputs:
+  - html
+  - rss
+  - json
+date: 2022-01-31
+draft: false
+---

content/blog/a-better-way-to-compress-big-data.md

@@ -0,0 +1,41 @@
+---
+title: "A Better Way to Compress Big Data"
+date: "2018-03-08"
+categories: 
+  - "blogs"
+tags: 
+  - "openpower"
+  - "center-for-genome-research-and-biocomputing"
+  - "oregon-state-university"
+  - "ibm-power-systems"
+---
+
+## **Wasting CPU hours on compression**
+
+The Center for Genome Research and Biocomputing (CGRB) has a large computing resource that supports researchers at Oregon State University by providing processing power, file storage service and more. This computational resource is also used to capture all data generated from the CGRB Core Laboratory facility that processes biological samples used in High Throughput Sequencing (HTS) and other data rich tools.
+
+Currently, the CGRB Core Lab generates between 4TB and 8TB of data per day which directly lands on the biocomputing resource and is made immediately available to researchers.  Because of this, the CGRB has over 4PB of usable space within our biocomputing facility and continues to add space monthly. Since individual labs must purchase file space needed to accomplish their research, there is always pressure from the lab managers to have users clean up and reduce space allowing for new experiments to be done without the need to purchase more space. This process leads to many users taking CPU time to compress data needed for later use but limiting the lab’s current available space. Since we like to use processing machines for processing data and not just compressing, we needed to find a solution allowing GZIP work to be done without tying up our CPU hours.
+
+## **More computing, faster**
+
+To reduce loads on the processing machines and computational time devoted to compressing data, we started considering FPGA cards.
+
+Specifically, we evaluated offloading compression processes directly onto a peripheral FPGA card. Offloading compression would increase our output and help manage file space usage so groups do not have to purchase more space to start new experiments.
+
+The new IBM Power Systems POWER8 machines include an interface used to increase speed from CPUs to FPGAs in expansion slots. The Coherent Accelerator Processor Interface (CAPI) connects the expansion bus and allows users to access resources external to the main CPU and memory with up to 238 GB/sec bus speed, thus overcoming a key limitation when working with large data sets.
+
+Our users do take advantage of the capabilities of the FPGA card, they not only complete their tasks more quickly, but also free up additional CPU hours for other researchers on the cluster. The solution has provided a net benefit in resource utilization and thus has allowed _all_ users to do more computing, faster.
+
+## **The GZIP coprocessor success story**
+
+Initial tests showed compressing a small job with a 22-gigabyte file using the CPU would take over 9 minutes of time versus running on the FPGA card the same file would finish in 19 seconds. These tests were changed to massively increase the data being compressed and found that a job that would take 67 hours on the CPU would only take 50 minutes on the FPGA.
+
+The FPGA GZIP coprocessor has allowed our researchers and staff to quickly recover valuable file space, while speeding up analytics and processing. The coprocessor has its own queue allowing users to submit jobs that can access the gzip card rather than wait to use it interactively. As the coprocessor can only be utilized by a single process at any given time, using the queuing system allows for a mechanism where multiple users can submit jobs to use the card without over-loaded card since the queue waits for one job to finished before beginning the next.
+
+We have seen as much as a 100-fold increase in the rate at which we can compress and decompress data to and from our storage cluster. These data largely consist of text-based strings (e.g., A, C, T and G nucleotides), meaning they are highly compressible.
+
+The compression ratio achieved with the gzip card is inferior to that obtained by running gzip directly through the main processor. Our observations indicate that the gzip card yields approximately 80% of the compression obtained using standard methods. This was within an acceptable range for our users since the speed of both compression and decompression is so much greater than those achieved by the standard methods.
+
+<table><tbody><tr><td>15 GB .fastq sequence file</td><td><strong>Compressed</strong></td><td><strong>Runtime</strong></td><td><strong>Compression ratio</strong></td><td><strong>Compression</strong><strong>?</strong><strong> rate (GB/s)</strong></td></tr><tr><td>CPU gzip</td><td>3.1 GB</td><td>28m 53s</td><td>5.16</td><td>0.006</td></tr><tr><td>CPU gzip -9</td><td>2.9 GB</td><td>133M 36s</td><td>5.17</td><td>0.001</td></tr><tr><td>Power/CAPI Genwqe_gzip</td><td>4.2 GB</td><td>71 seconds</td><td>3.57</td><td>0.152</td></tr></tbody></table>
+
+**Table-1:** Compression ratio comparison between CPU and FPGA of a 15GB fastq DNA sequence file.

content/blog/a-deep-dive-into-a2i-and-a2o.md

@@ -0,0 +1,58 @@
+---
+title: "A Deep Dive into A2I and A2O"
+date: "2020-12-21"
+categories: 
+  - "blogs"
+tags: 
+  - "openpower"
+  - "ibm"
+  - "power"
+  - "openpower-foundation"
+  - "open-source"
+  - "a2i"
+  - "a2o"
+  - "open-hardware"
+  - "developer-community"
+  - "isa"
+  - "power-processor-core"
+---
+
+**By [Abhishek Jadhav,](https://www.linkedin.com/in/abhishek-jadhav-60b30060/) Lead Open Hardware Developer Community (India) and Freelance Tech Journalist**
+
+After the opening of the [POWER instruction set architecture (ISA)](https://newsroom.ibm.com/2019-08-21-IBM-Demonstrates-Commitment-to-Open-Hardware-Movement) last August, there have been many developments from IBM and its community. 
+
+Some major contributions include OpenPOWER’s A2I and A2O POWER processor core. 
+
+The OpenPOWER Foundation, which is under the umbrella of the Linux Foundation, works on the advocacy of POWER Instruction Set Architecture and its usage in the industry. 
+
+## **What is A2I the core?**
+
+[A2I core](https://github.com/openpower-cores/a2i/blob/master/rel/doc/A2_BGQ.pdf) was created as a high-frequency four-threaded design, optimized for throughput and targeted for 3 GHz in 45nm technology. It was created to provide high streaming throughput, balancing performance and power.
+
+_![](images/IB1-1024x680.png)_
+
+_“With a strong foundation of the open POWER ISA and now the A2I core, the open source hardware movement is poised to accelerate faster than ever,” said James Kulina, Executive Director, OpenPOWER Foundation._
+
+A2I was developed as a processor for customization and embedded use in system-on-chip (SoC) devices, however, it's not limited to that— it can be seen in supercomputers with appropriate accelerators. There is a diverse range of applications associated with the core including streaming, network processing, data analysis. 
+
+We have an [Open Hardware Developer Community](https://www.linkedin.com/groups/12431698/) and contributors across India working on A2I in multiple use cases. where there has been an increasing contribution from the open source community. 
+
+If you want a headstart on A2I core, check out this short [tutorial](https://github.com/openpower-cores/a2i/blob/master/rel/doc/a2_build_video.md) on how to get started. 
+
+## **The launch of A2O**
+
+A couple of months after the A2I core’s release at [OpenPOWER Summit 2020](https://events.linuxfoundation.org/openpower-summit-north-america/), the OpenPOWER Foundation announced the A2O POWER processor core, an out-of-order follow-up to the A2I core. The A2O processor core is now open-source as a POWER ISA core for embedded use in SoC designs. The A2O offers better single-threaded performance, supports PowerISA 2.07, and has a modular design.
+
+![](images/IMB2-1024x575.png)
+
+Potential A2O POWER processor core applications include artificial intelligence, autonomous driving, and secure computing. 
+
+If you want to get started with A2O POWER processor core, watch this short [tutorial](https://github.com/openpower-cores/a2o/blob/master/rel/doc/a2_build_video.md). 
+
+The A2O reference manual is available [here](https://github.com/openpower-cores/a2o/blob/master/rel/doc/A2O_UM.pdf). 
+
+ 
+
+Join the [Open Hardware Developer Community](https://www.linkedin.com/groups/12431698/) to engage in exciting projects on A2I and A2O processor core. 
+
+_Source: All the images were taken from the_ [_Github Repo_](https://github.com/openpower-cores/a2i/tree/master/rel/doc) _and_ [_OpenPOWER Summit North America 2020_](https://openpowerna2020.sched.com/event/eOyb/ibm-open-sources-the-a2o-core-bill-flynn-ibm)_._

content/blog/a-powerful-birthday-gift-to-moores-law.md

@@ -0,0 +1,38 @@
+---
+title: "A POWERFUL Birthday Gift to Moore's Law"
+date: "2015-04-12"
+categories: 
+  - "blogs"
+tags: 
+  - "featured"
+---
+
+By Bradley McCredie
+
+President, OpenPOWER Foundation
+
+As we prepare to join the computing world in celebrating the 50th anniversary of Moore’s Law, we can’t help but notice how the aging process has slowed it down. In fact, in a [recent interview](http://spectrum.ieee.org/computing/hardware/gordon-moore-the-man-whose-name-means-progress) with IEEE Spectrum, Moore said, “I guess I see Moore’s Law dying here in the next decade or so.”  But we have not come to bury Moore’s Law.  Quite the contrary, we need the economic advancements that are derived from the scaling Moore’s law describes to survive -- and they will -- if it adapts yet again to changing times.
+
+It is clear, as the next generation of warehouse scale computing comes of age, sole reliance on the “tick tock” approach to microprocessor development is no longer viable.  As I told the participants at our first OpenPOWER Foundation summit last month in San Jose, the era of relying solely on the generation to generation improvements of the general-purpose processor is over.  The advancement of the general purpose processor is being outpaced by the disruptive and surging demands being placed on today’s infrastructure.  At the same time, the need for the cost/performance advancement and computational growth rates that Moore’s law used to deliver has never been greater.   OpenPOWER is a way to bridge that gap and keep Moore’s Law alive through customized processors, systems, accelerators, and software solutions.  At our San Jose summit, some of our more than 100 Foundation members, spanning 22 countries and six continents, unveiled the first of what we know will be a growing number of OpenPOWER solutions, developed collaboratively, and built upon the non-proprietary IBM POWER architecture. These solutions include:
+
+Prototype of IBM’s first OpenPOWER high performance computing server on the path to exascale
+
+- First commercially available OpenPOWER server, the TYAN TN71-BP012
+- First GPU-accelerated OpenPOWER developer platform, the Cirrascale RM4950
+- Rackspace open server specification and motherboard mock-up combining OpenPOWER, Open Compute and OpenStack
+
+Together, we are reimagining the data center, and our open innovation business model is leading historic transformation in our industry.
+
+The OpenPOWER business model is built upon a foundation of a large ecosystem that drives innovations and shares the profits from those innovations. We are at a point in time where business model innovation is just as important to our industry as technology innovation.
+
+You don’t have to look any further than OpenPOWER Chairman, Gordon MacKean’s company, Google to see an example of what I mean. While the technology that Google creates and uses is leading in our industry, Google would not be even be a shadow of the company it is today without it’s extremely innovative business model. Google gives away all of its advanced technology for free and monetizes it through other means.
+
+In fact if you think about it, most all of the fastest growing “new companies” in our industry are built on innovative technology ideas, but the most successful ones are all leveraging business model innovations as well.
+
+The early successes of the OpenPower approach confirm what we all know – to expedite innovation, we must move beyond a processor and technology-only design ecosystem to an ecosystem that takes into account system bottlenecks, system software, and most importantly, the benefits of an open, collaborative ecosystem.
+
+This is about how organizations, companies and even countries can address disruptions and technology shifts to create a fundamentally new competitive approach.
+
+No one company alone can spark the magnitude or diversity of the type of innovation we are going to need for the growing number of hyper-scale data centers. In short, we must collaborate not only to survive…we must collaborate to innovate, differentiate and thrive.
+
+The OpenPOWER Foundation, our global team of rivals, is modeling what we IBMers like to call “co-opetition” – competing when it is in the best interest of our companies and cooperating with each other when it helps us all.  This combination of breakthrough technologies and unprecedented collaboration is putting us in the forefront of the next great wave of computing innovation.  Which takes us back to Moore’s Law.  In 1965, when Gordon Moore gave us a challenge and a roadmap to the future, there were no smartphones or laptops, and wide-scale enterprise computing was still a dream.  None of those technology breakthroughs would have been possible without the vision of one man who shared it with the world.  OpenPOWER is a bridge we share to a new era. Who knows what breakthroughs it will spawn in our increasingly technology-driven and connected world.  As Moore’s Law has shown us, the future is wide open.

content/blog/a2i-power-processor-core-contributed-to-openpower-community-to-advance-open-hardware-collaboration.md

@@ -0,0 +1,31 @@
+---
+title: "A2I POWER Processor Core Contributed to OpenPOWER Community to Advance Open Hardware Collaboration"
+date: "2020-06-30"
+categories: 
+  - "blogs"
+tags: 
+  - "openpower"
+  - "ibm"
+  - "openpower-foundation"
+  - "linux-foundation"
+  - "power-isa"
+  - "open-source"
+  - "ibm-a2i"
+  - "a2i-power-processor"
+  - "open-source-hardware"
+  - "open-source-summit"
+---
+
+At The Linux Foundation Open Source Summit today, the OpenPOWER Foundation announced a major contribution to the open source ecosystem: the IBM A2I POWER processor core design and associated FPGA environment. Following the [opening of the POWER Instruction Set Architecture (ISA)](https://newsroom.ibm.com/2019-08-21-IBM-Demonstrates-Commitment-to-Open-Hardware-Movement) last August, today’s announcement further enables the OpenPOWER Foundation to cultivate an ecosystem of open hardware development.
+
+![A2I POWER Processor Core](images/A2I-POWER-Processor-Core-1024x583.png)
+
+The A2I core is an in-order multi-threaded 64-bit POWER ISA core that was developed as a processor for customization and embedded use in system-on-chip (SoC) devices. It was designed to provide high streaming throughput while balancing performance and power. Originally the “wire-speed processor” of the Edge-of-Network SoC called PowerEN, it was later selected as the general purpose processor used in IBM’s BlueGene/Q family of systems, which helped to advance scientific discovery over the last decade. Built for modularity, A2I has the ability to add an Auxiliary Execution Unit (AXU) that is tightly-coupled to the core, enabling many possibilities for special-purpose designs for new markets tackling the challenges of modern workloads.
+
+“A2I has demonstrated it’s durability over the last decade - it’s a powerful technology with a wide range of capabilities,” said Mendy Furmanek, President, OpenPOWER Foundation and Director, POWER Open Hardware Business Development, IBM. “We’re excited to see what the open source community can do to modernize A2I with today’s open POWER ISA and to adapt the technology to new markets and diverse use cases.”
+
+“With a strong foundation of the open POWER ISA and now the A2I core, the open source hardware movement is poised to accelerate faster than ever,” said [James Kulina](https://www.linkedin.com/in/james-kulina/), Executive Director, OpenPOWER Foundation. “A2I gives the community a great starting point and further enables developers to take an idea from paper to silicon.”
+
+The A2I core is available on GitHub and [can be accessed here](https://github.com/openpower-cores/a2i). 
+
+[Register for OpenPOWER Summit North America 2020](https://events.linuxfoundation.org/openpower-summit-north-america/) - a free, virtual experience - to learn more about the A2I core and other developments across the OpenPOWER ecosystem.

content/blog/academic-and-industry-experts-share-expertise-during-openpower-and-ai-workshop-at-loyola-institute-of-technology.md

@@ -0,0 +1,27 @@
+---
+title: "Academic and Industry Experts Share Expertise During OpenPOWER and AI Workshop at Loyola Institute of Technology"
+date: "2019-03-07"
+categories: 
+  - "blogs"
+---
+
+By [Dr. Sujatha Jamuna Anand](https://www.linkedin.com/in/dr-sujatha-jamuna-anand-4251ba92/), Principal, Loyola Institute of Technology
+
+![](images/loyola-1-300x150.jpg)
+
+We recently held the OpenPOWER and AI training workshop in Chennai, India. In addition to faculty and students from [Loyola Institute of Technology](https://litedu.in/), we were joined by academic and industry experts from [IBM](https://www.ibm.com/us-en/?ar=1), [Open Computing Singapore](https://opencomputing.sg/), [Indian Institute of Technology Madras](https://www.iitm.ac.in/), [University of Engineering and Management Kolkata](http://uem.edu.in/uem-kolkata/) and [Object Automation](http://www.object-automation.com/).
+
+Attendees learned from a number of sessions:
+
+- [Ganesan Narayanasamy](https://www.linkedin.com/in/ganesannarayanasamy/), IBM shared insight on AI, deep learning inferencing and edge computing. As part of his presentation, he shared several use cases which have been deployed in multiple industries around the world.
+- [Jayaram Kizhekke Pakkathillam](https://www.linkedin.com/in/jayaram-kizhekke-pakkathillam-6b2b0963/), IIT Madras gave a brief introduction about unmanned aerial vehicles (UAVs) and the projects he’s worked on as part of IIT Madras’ Aerospace Engineering department. He also discussed how UAVs are effectively used for military and agricultural purposes with examples of different AI systems.
+- [Wilson Josup](https://www.linkedin.com/in/wilson-josup-cdcp-ccca-a18ab943/), Open Computing Singapore spoke about the difference between CPUs and GPUs, different types and use cases of GPUs and how OpenPOWER architecture innovations contribute to improved performance from applications.
+- [Gayathri Venkataramanan](https://www.linkedin.com/in/gayathri-venkataramanan-0a8831166/), Object Automation and [Prince Barai](https://www.linkedin.com/in/prince-pratik7/), University of Engineering and Management Kolkata delivered various AI use cases with excellent examples.
+
+Beyond features of AI, several presentations and demonstrations answered how data-driven innovation can be brought to life, and what steps are needed to move AI out of the lab and into mainstream business.
+
+The OpenPOWER and AI Workshop provided opportunities for young students to initiate their own AI-related projects and collaborations.
+
+ 
+
+![](images/loyola-2-300x225.jpg)

content/blog/accelerated-photodynamic-cancer-therapy-planning-with-fullmonte-on-openpower.md

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+---
+title: "Accelerated Photodynamic Cancer Therapy Planning with FullMonte on OpenPOWER"
+date: "2015-01-19"
+categories: 
+  - "blogs"
+---
+
+### Abstract
+
+Photodynamic therapy (PDT) is a minimally-invasive cancer therapy which uses a light-activated drug (photosensitizer/PS). When the photosensitizer absorbs a photon, it excites tissue oxygen into a reactive state which causes very localized cell damage. The light field distribution inside the tissue is therefore one of the critical parameters determining the treatment's safety and efficacy. While FDA-approved and used for superficial indications, PDT has yet to be widely adopted for interstitial use for larger tumours using light delivered by optical fibres due to a lack of simulation and planning optimization software. Because tissue at optical wavelengths has a very high scattering coefficient, extensive Monte Carlo modeling of light transport is required to simulate the light distribution for a given treatment plan. To enable PDT planning, we demonstrate here our “FullMonte” system which uses a CAPI-enabled FPGA to simulate light propagation 4x faster and 67x more power-efficiently than a highly-tuned multicore CPU implementation. With coherent low-latency access to host memory, we are not limited by the size of on-chip memory and are able to transfer results to and from the accelerator rapidly, which will be support our iterative planning flow. Potential advantages of interstitial PDT include less invasiveness and potential post-operative complications than surgery, better damage targeting and confinement than radiation therapy, and no systemic toxicity unlike chemotherapy. While attractive for developed markets for better outcomes, PDT is doubly attractive in emerging regions because it offers the possibility of a single-shot treatment with very low-cost and even portable equipment supported by remotely-provided computing services for planning.
+
+### Bios
+
+Jeffrey Cassidy, MASc, PEng is a PhD candidate in Electrical and Computer Engineering at the University of Toronto. Lothar Lilge, PhD is a senior scientist at the Princess Margaret Cancer Centre and a professor of Medical Biophysics at the University of Toronto. Vaughn Betz, PhD is the NSERC-Altera Chair in Programmable Silicon at the University of Toronto.
+
+### Acknowledgements
+
+The work is supported by the Canadian Institutes of Health Research, the Canadian Natural Sciences and Engineering Research Council, IBM, Altera, Bluespec, and the Southern Ontario Smart Computing Innovation Platform.
+
+### Presentation
+
+<iframe src="https://openpowerfoundation.org/wp-content/uploads/2015/03/Cassidy-Jeff_OPFS22015_031015_final.pdf" width="100%" height="450" frameborder="0"></iframe>
+
+ [Download Presentation](https://openpowerfoundation.org/wp-content/uploads/2015/03/Cassidy-Jeff_OPFS22015_031015_final.pdf)
+
+[Back to Summit Details](javascript:history.back())

content/blog/accelerating-key-value-stores-kvs-with-fpgas-and-openpower.md

@@ -0,0 +1,92 @@
+---
+title: "Accelerating Key-value Stores (KVS) with FPGAs and OpenPOWER"
+date: "2015-11-13"
+categories: 
+  - "blogs"
+tags: 
+  - "capi"
+  - "fpga"
+  - "xilinx"
+  - "kvs"
+---
+
+_By Michaela Blott, Principal Engineer, Xilinx Research_
+
+First, a bit of background-- I lead a research team in the European headquarters of Xilinx where we look into FPGA-based solutions for data centers. We experiment with the most advanced platforms and tool flows, hence our interest in OpenPOWER. If you haven't worked with an FPGA yet, it’s a fully programmable piece of silicon that allows you to create the perfect hardware circuit for your application thereby achieving best-in-class performance through customized data-flow architectures, as well as substantial power savings.  That means we can investigate how to make data center applications faster, smarter and greener while scrutinizing silicon features and tools flows. Our first application deep-dive was, and still is, key-value stores.
+
+Key-value stores (KVS) are a fundamental part of today’s data center functionality. Facebook, Twitter, YouTube, flickr and many others use key-value stores to implement a tier of distributed caches for their web content to alleviate access bottlenecks on relational databases that don’t scale well. Up to 30% of data center servers implement key-value stores. But data centers are hitting a wall with performance requirements that drive trade-offs between high DRAM costs (in-memory KVS), bandwidth, and latency.
+
+We’ve been investigating KVS stores such as memcached since 2013 \[1,2\]. Initially the focus was on pure acceleration and power reduction. Our work demonstrated a substantial 35x performance/power versus the fastest x86 results published at the time. The trick was to completely transform the multithreaded software implementation into a data-flow architecture inside an FPGA as shown below.
+
+\[caption id="attachment\_2117" align="aligncenter" width="693"\]![Fig 1](images/Fig-1.jpg) Figure 1: 10Gbps memcached with FPGAs\[/caption\]
+
+However, there were a number of limitations: First, we were not happy with the constrained amount of DRAM that can be attached to an FPGA -- capacity is really important in the KVS context. Secondly, we were concerned about supporting more functionality.   For example, for protocols like Redis with its 200 commands, things can get complicated. Thirdly, we worried about ease-of-use, which is a typical adoption barrier for FPGAs. Finally, things become even more interesting once you add intelligence on top of your data: data analytics, object recognition, encryption, you name it. For this we really need a combination of compute resources that coherently shares memory. That’s exactly why OpenPOWER presented a unique and most timely opportunity to experiment with coherent interfaces.
+
+**Benchmarking CAPI**
+
+CAPI, the Coherent Accelerator Processor Interface, enables high performance and simple programming models for attaching FPGAs to POWER8 systems. First, we benchmarked PCI-E and CAPI acceleration against x86 in-memory models to determine the latency of PCI-E and CAPI. The results are explained below:
+
+\[caption id="attachment\_2118" align="aligncenter" width="619"\]![Figure2_new](images/Figure2_new.jpg) Figure 2: System level latency OpenPower with FPGA vs x86\[/caption\]
+
+**Latency**
+
+PCI-E DMA Engines and CAPI perform significantly better than typical x86 implementations. At 1.45 microseconds, CAPI operations are so low-latency that overall system-level impact is next to negligible.  Typical x86 installations service memcached requests within a range of 100s to 1000s of microseconds. Our OpenPower CAPI installation services the same requests in 3 to 5 microseconds, as illustrated in Figure 2 (which uses a logarithmic scale).
+
+\[caption id="attachment\_2119" align="aligncenter" width="698"\]![Figure3_new](images/Figure3_new.jpg) Figure 3: PCIe vs CAPI Bandwidth over transfer sizes\[/caption\]
+
+**Bandwidth**
+
+Figure 3 shows measured bandwidth vs. transfer size for CAPI in comparison to a generic PCIe DMA. The numbers shown are actual measurements \[4\] and are representative in that PCIe performance is typically very low for small transfer sizes and next to optimal for large transfer sizes. So for small granular access, CAPI far outperforms PCIe. Because of this, CAPI provides a perfect fit for the small transfer sizes as required in the KVS scenario. For implementing object storage in host memory, we are really only interested in using CAPI in the range of transfer sizes of 128 bytes to 1kbyte. Smaller objects can be easily accommodated in FPGA-attached DRAM; larger objects can be accommodated in Flash (see also our HotStorage 2015 publication \[3\]).
+
+**FPGA Design**
+
+Given the promising benchmarking results, we proceeded to integrate the host memory via CAPI. For this we created a hybrid memory controller which routes and merges requests and responses between the various storage types, handles reordering, and provides a gearbox for varying access speeds and bandwidths. With these simple changes, we now have up to 1 Terabyte of coherent memory space at our disposal without loss of performance! Figure 4 shows the full implementation inside the FPGA.
+
+\[caption id="attachment\_2120" align="aligncenter" width="748"\]![Figure4](images/Figure4.jpg) Figure 4: Memcached Implementation with OpenPower and FPGA\[/caption\]
+
+**Ease of Use**
+
+Our next biggest concern was ease of use for both FPGA design entry as well as with respect to host–accelerator integration. In regards to the latter, OpenPOWER exceeded our expectations. Using the provided API from IBM (libcxl) as well as the POWER Service Layer IP that resides within the FPGA (PSL), we completed system integration within a matter of weeks while saving huge amounts of code: 800 lines of code to be precise for x86 driver, memory allocation, and pinning, and 13.5k fewer instructions executed!
+
+Regarding the FPGA design, it was of utmost importance to ensure that it is possible to create a fully functional and high-performing design through a high-level design flow (C/C++ at minimum), in the first instance using Xilinx’s high-level synthesis tool, Vivado HLS. The good news was that we fully succeeded in doing this and the resulting application design was fully described in C/C++, achieving a 60% reduction in lines of code (11359 RTL vs 4069 HLS lines). The surprising bonus was that we even got a resource reduction – for FPGA-savvy readers: 22% in LUTs & 30% in FFs. And let me add, just in case you are wondering, the RTL designers were at the top of their class!
+
+The only low-level aspects left in the design flow are the basic infrastructure IP, such as memory controllers and network interfaces, which are still manually integrated. In the future, this will be fully automated through SDAccel. In other words, a full development environment that requires no further RTL development is on the horizon.
+
+**Results**
+
+\[caption id="attachment\_2121" align="aligncenter" width="693"\]![Figure5](images/Figure5.jpg) Figure 5: Demonstration at the OpenPower Summit 2015\[/caption\]
+
+We demonstrated the first operational prototype of this design at Impact in April 2014 and then demonstrated the fully operational demo vehicle (shown in Figure 5) including fully CAPI-enabled access to host memory at the OpenPOWER Summit in March 2015. The work is now fully integrated with [IBM’s SuperVessel](http://www.ptopenlab.com). In the live demonstration, the OpenPOWER system outperforms an x86 implementation by 20x (see Figure 6)!
+
+\[caption id="attachment\_2122" align="aligncenter" width="625"\]![kvs_comparison](images/kvs_comparison-1024x577.jpg) Figure 6: Screenshot of network tester showing response traffic rates from OpenPower with FPGA acceleration versus x86 software solution\[/caption\]
+
+**Summary**
+
+The Xilinx demo architecture enables key-value stores that can operate at **60Gbps with 2TB value-store capacity** that fits within a 2U OpenPOWER Server. The architecture can be easily extended. We are actively investigating using Flash to expand value storage even further for large granular access. But most of all, we are really excited about the opportunities for this architecture when combining this basic functionality with new capabilities such as encryption, compression, data analytics, and face & object recognition!
+
+**Getting Started**
+
+- Visit [Xilinx at SC15](http://www.xilinx.com/about/events/sc15.html)! November 15-19, Austin, TX.
+- Learn more about [POWER8 CAPI](http://www-304.ibm.com/webapp/set2/sas/f/capi/home.html)
+- Purchase a CAPI developer kit from [Nallatech](http://www.nallatech.com/solutions/openpower-capi-developer-kit-for-power-8/) or [AlphaData](http://www.alpha-data.com/dcp/capi.php)
+- License this technology through [Xilinx](http://www.xilinx.com/) today.  We work directly with customers and data centers to scale performance/watt in existing deployments with hardware based KVS accelerators. If you are interested in this technology, please contact us.
+
+\==================================================================================
+
+**References**
+
+_\[1\] M.Blott, K.Vissers, K.Karras, L.Liu, Z. Istvan, G.Alonso: HotCloud 2013; Achieving 10Gbps line-rate key-value stores with FPGAs_
+
+_\[2\] M.Blott, K. Vissers: HotChips’14; Dataflow Architectures for 10Gbps Line-rate Key-value-Stores._
+
+_\[3\] M.Blott, K.Vissers, L.Liu: HotStorage 2015; Scaling out to a Single-Node 80Gbps Memcached Server with 40Terabytes of Memory_
+
+_\[4\] PCIe bandwidth reference numbers were kindly provided by Noa Zilberman & Andrew Moore from Cambridge University_
+
+* * *
+
+**_About Michaela Blott_**
+
+![Michaela Blott](images/Michaela-Blott.png)
+
+Michaela Blott graduated from the University of Kaiserslautern in Germany. She worked in both research institutions (ETH and Bell Labs) as well as development organizations and was deeply involved in large scale international collaborations such as NetFPGA-10G. Today, she works as a principal engineer at the Xilinx labs in Dublin heading a team of international researchers, investigating reconfigurable computing for data centers and other new application domains. Her expertise includes data centers, high-speed networking, emerging memory technologies and distributed computing systems, with an emphasis on building complete implementations.

content/blog/accelerator-opportunities-with-openpower.md

@@ -0,0 +1,31 @@
+---
+title: "Accelerator Opportunities with OpenPower"
+date: "2015-01-16"
+categories: 
+  - "blogs"
+---
+
+### Abstract
+
+The OpenPower architecture provides unique capabilities which will enable highly effective and differentiated acceleration solutions.   The OpenPower Accelerator Workgroup is chartered to develop both hardware the software standards which provide vendors the ability to develop these solutions.  The presentation will cover an overview of the benefits of the OpenPower architecture for acceleration solutions.   We will provide an overview of the Accelerator Workgroups plans and standards roadmap.   We will give an overview of the OpenPower CAPI development kit.   We will also walk through an example of a CAPI attached acceleration solution.
+
+### Presentation agenda
+
+- Overview of opportunity for OpenPower acceleration solutions
+- OpenPower Accelerator workgroup charter and standards roadmap
+- OpenPower CAPI Development Kit
+- CAPI attached acceleration solution example
+
+### Bio
+
+[Nick Finamore](https://www.linkedin.com/profile/view?id=4723882&authType=NAME_SEARCH&authToken=2y98&locale=en_US&srchid=32272301421437850712&srchindex=3&srchtotal=8&trk=vsrp_people_res_name&trkInfo=VSRPsearchId%3A32272301421437850712%2CVSRPtargetId%3A4723882%2CVSRPcmpt%3Aprimary), Altera Corporation Product Marketing Manager for Software Development Tools  Chairperson,  OpenPower Foundation Accelerator Workgroup
+
+For the past 3 years Nick has been leading Altera’s computing acceleration initiative and the marketing  of Altera’s SDK for OpenCL.  Previously Nick was in several leadership positions at early stage computing and networking technology companies including Netronome, Ember(SiLabs) and Calxeda.   Nick also had an 18 year career at Intel where he held several management positioning including general manager of the network processor division.
+
+### Presentation
+
+<iframe src="https://openpowerfoundation.org/wp-content/uploads/2015/03/Finamore-Nick_OPFS2015_Altera_031215_final.pdf" width="100%" height="450" frameborder="0"></iframe>
+
+ [Download Presentation](https://openpowerfoundation.org/wp-content/uploads/2015/03/Finamore-Nick_OPFS2015_Altera_031215_final.pdf)
+
+[Back to Summit Details](javascript:history.back())

content/blog/acrc-openpower.md

@@ -0,0 +1,30 @@
+---
+title: "Singapore's A*CRC Joins the OpenPOWER Foundation to Accelerate HPC Research"
+date: "2016-03-17"
+categories: 
+  - "blogs"
+tags: 
+  - "featured"
+---
+
+_By Ganesan Narayanasamy, Senior Manager, IBM Systems_
+
+Singapore’s Agency for Science, Technology and Research (A\*STAR) is the largest government funded research organization in Singapore, with over 5,300 personnel in 14 research institutes across the country.
+
+[![A STAR Computational Resource Centre](images/A-STAR-Computational-Resource-Centre.png)](https://openpowerfoundation.org/wp-content/uploads/2016/03/A-STAR-Computational-Resource-Centre.png)
+
+A\*STAR Computational Resource Centre (A\*CRC) provides high performance computational (HPC) resources to the entire A\*STAR research community. Currently A\*CRC supports HPC needs of an 800 member user community and manages several high-end computers, including an IBM 822LC system with NVIDIA K80 GPU Cards and Mellanox EDR switch to port and optimize the HPC applications. It is also responsible for very rapidly growing data storage resources.
+
+A\*CRC will work with IBM and the OpenPOWER Foundation to hasten its path to develop applications on OpenPOWER Systems leveraging the Foundation’s ecosystem of technology.
+
+https://youtu.be/F07fJHhQdu4
+
+Experts it A\*CRC will explore the range of scientific applications that leverage the Power architecture as well as NVIDIA’s GPU and Mellanox’s 100 GB/sec Infiniband switches. The switches are designed to work with IBM's Coherent Application Processor Interface (CAPI), an OpenPOWER technology that allows attached accelerators to connect with the Power chip at a deep level.
+
+A\*CRC also will work with the OpenPOWER Foundation on evolving programming models such as OpenMP, the open multiprocessing API designed to support multi-platform shared memory.
+
+“We need to anticipate the rise of new high performance computing architectures that bring us closer to exascale and prepare our communities,” A\*CRC CEO Marek Michalewicz noted in a statement.
+
+[![SCF2016-logo_final_retina2](images/SCF2016-logo_final_retina2-300x129.png)](https://openpowerfoundation.org/wp-content/uploads/2016/03/SCF2016-logo_final_retina2.png)
+
+This week, A\*STAR is hosting the [Singapore Supercomputing Frontiers Conference](http://supercomputingfrontiers.com/2016/). To learn more about their work, take part in our OpenPOWER workshop on March 18 and stay tuned for additional updates.

content/blog/adgworkshop22.md

@@ -0,0 +1,43 @@
+---
+title: ADG Workshop 2022 Review
+author: Ganesan Narayanasamy
+tags:
+  - openpower
+  - adg
+  - academic
+  - workshop
+date: 2022-12-05
+draft: false
+---
+
+Since its founding in 2013, OpenPOWER Foundation membership has grown to more than 300+ members, including over 100 academic members; the latter formed the Academic Bird of a Feather (BoF) group.  
+This group has run several workshops worldwide enabling students, professors and developers in chip development to AI, hybrid cloud, and big data solutions.  
+The ADG group hosted its 8th workshop at the SC22 conference in Dallas on Nov 12th 2022.  
+
+{{< image src="blog/adgworkshop22-image1.jpg" >}}
+
+During a packed one day event, presenters from academia and industry examined progress and opportunities to leverage OpenPOWER technology.  
+The workshop’s primary goals, say organizers, were to facilitate networking and improve technical knowledge of ADG members on relevant OpenPOWER capabilities.  
+The event also provided a platform for commercial OpenPOWER members to explore opportunities for collaboration with ADG members. 
+Workshop conveners included Prof Dr Sameer Shende (Research Professor and Performance Lab Director at University of Oregon), Ganesan Narayanasamy (OpenPOWER Academia BoF Chair). 
+
+{{< image src="blog/adgworkshop22-image2.jpg" >}}
+
+Representatives from IBM, University of Oregon, Virginia Tech, Oregon State University, UT Dallas, Werner Enterprises, Ohio State University, Object Automation System Solutions, NJIT,
+Intel, X-Scale Solutions, TU-DELFT, University of Michigan and many more discussed their contributions to the OpenPOWER ecosystem.  
+The presentations coverered a range of topics, including POWER processor architecture, performance engineering, open source base board management controller, enterprise AI solutions,
+distributed deep learning, along with development and scalability of application for AI and HPC.  
+
+There was even a special session about OpenPOWER Hub, with two Hub providers, the University of Oregon and Oregon State Unviersity, showcased how students,
+researchers and developers can get access to the hub and collaborate on developing applications using the POWER platform.  
+
+All of the presentations as well as recorded talks may be downloaded from our event page.  
+[OpenPOWER Academic BoF Workshop Event Page](/events/adgsc22/)
+
+OpenPOWER is a member driven ecosystem, where one can consume, contribute, and collaborate to develop a complete secure open platform.
+As summarized by Dr Sameer Shende, “_Member companies are enabled to customize POWER processors and system platforms for optimization and innovation for their business needs.
+These innovations include development of custom systems and processor for special super computers, or advanced hardware technology exploitation._”
+
+{{< image src="blog/adgworkshop22-image3.jpg" >}}
+
+According to the participants, the workshop showcased ADG and several participants interest in the rapidly expanding OpenPOWER ecosystem and their intention to play a visible role.

content/blog/advancing-human-brain-project-openpower.md

@@ -0,0 +1,24 @@
+---
+title: "Advancing the Human Brain Project with OpenPOWER"
+date: "2016-10-27"
+categories: 
+  - "blogs"
+tags: 
+  - "featured"
+---
+
+_By Dr. Dirk Pleiter, Research Group Leader, Jülich Supercomputing Centre_
+
+![Human Brain Project and OpenPOWER members NVIDIA, IBM](images/HBP_Primary_RGB-1-1024x698.png)
+
+The [Human Brain Project](https://www.humanbrainproject.eu/) (HBP), a flagship project [funded by the European Commission](http://ec.europa.eu/research/fp7/index_en.cfm), has set itself an ambitious goal: Unifying our understanding of the human brain. To achieve it, researchers need a High-Performance Analytics and Compute Platform comprised of supercomputers with features that are currently not available, but OpenPOWER is working to make them a reality.
+
+Through a Pre-Commercial Procurement (PCP) the HBP initiated the necessary R&D, and turned to the OpenPOWER Foundation for help. During three consecutive phases, a consortium of [IBM and NVIDIA has successfully been awarded with R&D contracts](http://www.fz-juelich.de/SharedDocs/Pressemitteilungen/UK/EN/2016/16-09-27hbp_pilotsysteme.html). As part of this effort, a pilot system called [JURON](https://hbp-hpc-platform.fz-juelich.de/?page_id=1073) (a combination of Jülich and neuron) has been installed at Jülich Supercomputing Centre (JSC). It is based on the [new IBM S822LC for HPC servers](https://www.ibm.com/blogs/systems/ibm-nvidia-present-nvlink-server-youve-waiting/), each equipped with two POWER8 processors and four NVIDIA P100 GPUs.
+
+Marcel Huysegoms, a scientist from [the Institute for Neuroscience and Medicine](http://www.fz-juelich.de/inm/EN/Home/home_node.html), with support from the JSC could demonstrate soon after deployment the usability of the system for his brain image registration application. Exploiting the processing capabilities of the GPUs without further tuning, could achieve a significant speed-up compared to the currently used production system based on Haswell x86 processors and K80 GPUs.
+
+Not only do the improved compute capabilities matter for brain research, but also by designing and implementing the Global Sharing Layer (GSL), the non-volatile memory cards mounted on all nodes became a byte addressable, globally accessible memory resource. Using JURON it could be shown that data can be read at a rate that is only limited by network performance. These new technologies will open new opportunities for enabling data-intensive workflows in brain research, including data visualization.
+
+The pilot system will be the first system based on POWER processors where graphics support is being brought to the HPC node. In combination with the GSL it will be possible to visualize large data volumes that are, as an example, generated by brain model simulations. Flexible allocation of resources to compute applications, data analytics and visualization pipelines will be facilitated through another new component, namely the dynamic resource management. It allows for suspension of execution of parallel jobs for a later restart with a different number of processes.
+
+JURON clearly demonstrates the potential of a technology ecosystem settled around a processor architecture with interfaces that facilitate efficient integration of various devices for efficient processing, moving and storing of data. In other words, it demonstrates the collaborative potential of OpenPOWER.

content/blog/advancing-the-openpower-vision.md

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+---
+title: "Advancing the OpenPOWER vision"
+date: "2015-01-16"
+categories: 
+  - "blogs"
+---
+
+### Abstract
+
+It’s been nearly a year since the public launch of OpenPower and the community of technology leaders that make up our community have made significant progress towards our original goals. While growth of the membership is a critical factor, our success will come from the technology provided through the ‘open model’ and the ‘value’ solutions that are enabled by leveraging that technology. Please join us as we highlight the key components that our member community have contributed to that ‘open model’ and spotlight some examples of high value solutions enabled through members leveraging our combined capabilities and strengths.
+
+### Speaker
+
+[Gordon MacKean](https://www.linkedin.com/profile/view?id=1547172&authType=NAME_SEARCH&authToken=PNgl&locale=en_US&trk=tyah2&trkInfo=tarId%3A1421437126543%2Ctas%3AGordon%20McKean%2Cidx%3A1-1-1) is a Sr. Director with the Hardware Platforms team at Google. He leads the team responsible for the design and development of the server and storage products used to power Google data centers. Prior to Google, Gordon held management and design roles at several networking companies including Matisse Networks, Extreme Networks, and Nortel Networks. Gordon is a founder of OpenPOWER Foundation and serves as the Chairman of the Board of Directors. Gordon holds a Bachelors degree in Electrical Engineering from Carleton University.
+
+### Presentation
+
+<iframe src="https://openpowerfoundation.org/wp-content/uploads/2015/03/MacKean-McCredie_OPFS2015_KEYNOTE15-03-16-gm5.pdf" width="100%" height="450" frameborder="0"></iframe>
+
+ [Download Presentation](https://openpowerfoundation.org/wp-content/uploads/2015/03/MacKean-McCredie_OPFS2015_KEYNOTE15-03-16-gm5.pdf)
+
+[Back to Summit Details](javascript:history.back())

content/blog/ai-improve-rural-healthcare.md

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+---
+title: "AI to Improve Rural Healthcare Discussed at OpenPOWER Summit Europe"
+date: "2018-10-18"
+categories: 
+  - "blogs"
+tags: 
+  - "featured"
+---
+
+By Dr. Praveen Kumar B.A. M.B.B.S, M.D., professor, Department of Community Medicine, PES Institute of Medical Sciences and Research
+
+It was great to attend the [OpenPOWER Summit Europe](https://openpowerfoundation.org/summit-2018-10-eu/) in Amsterdam earlier this month. As an academia member from a medical background, it was the first completely technical forum I had attended at an international level.
+
+The [PES Institute of Medical Sciences](http://pesimsr.pes.edu/), India has been working with IBM and the OpenPOWER community recently on developing AI solutions for patient care in our rural facility. We are a tertiary care teaching institute catering to a rural population of around one million. I attended the OpenPOWER Summit Europe to discuss the need and opportunity for deploying AI solutions in our work.
+
+<iframe style="border: 1px solid #CCC; border-width: 1px; margin-bottom: 5px; max-width: 100%;" src="//www.slideshare.net/slideshow/embed_code/key/7A5W1wzbDtaDzh" width="595" height="485" frameborder="0" marginwidth="0" marginheight="0" scrolling="no" allowfullscreen="allowfullscreen"></iframe>
+
+**[Artificial Intelligence in Healthcare at OpenPOWER Summit Europe](//www.slideshare.net/OpenPOWERorg/artificial-intelligence-in-healthcare-at-openpower-summit-europe "Artificial Intelligence in Healthcare at OpenPOWER Summit Europe")** from **[OpenPOWERorg](https://www.slideshare.net/OpenPOWERorg)**
+
+AI in health care was a featured theme throughout the OpenPOWER Summit Europe. Professor Florin Manaila demonstrated solutions he has worked on for breast cancer diagnosis and grading using image processing. And Professor Antonio Liotta spoke about machine learning and AI-related research in his lab.
+
+The AI4Good Hackathon invited researchers from across the world to find solutions for health challenges – particularly in cancer care. I was glad to see students from India and Europe participating.
+
+I look forward to networking with other academic and industry teams to work on further developing model training and implementation. Through collaboration, institutions can partner together to secure funding and innovate toward a brighter future.