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025cf5efe8
These provides some info about the SoC (though it's still somewhat incomplete and needs more work, see comments). There's also a control register for selecting DRAM vs. BRAM at 0 (and for soft-resetting the SoC but that isn't wired up yet). Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> |
4 years ago | |
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.. | ||
include | 4 years ago | |
libc | 4 years ago | |
Makefile | 4 years ago | |
bin2hex.py | 4 years ago | |
head.S | 4 years ago | |
main.c | 4 years ago | |
sdram_init.lds | 4 years ago |