forked from cores/microwatt
dcache: Loads from non-cacheable PTEs load entire 64 bits
A non-cacheable load should only load the data requested and no more. We do the right thing for real mode cache inhibited storage instructions, but when loading through a non-cacheable PTE we load the entire 64 bits regardless of the size. Signed-off-by: Anton Blanchard <anton@linux.ibm.com>dcache-nc-fix
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09bd01a49e
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