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fpu-init
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microwatt/fpga/nexys_a7.xdc

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Rename a few reset signals clk -> ext_clk reset_n -> ext_rst reset -> rst Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
5 years ago
set_property -dict {PACKAGE_PIN E3 IOSTANDARD LVCMOS33} [get_ports ext_clk]
create_clock -period 10.000 -name sys_clk_pin -waveform {0.000 5.000} -add [get_ports ext_clk]
Add constraint file for Nexys A7
5 years ago
Rename a few reset signals clk -> ext_clk reset_n -> ext_rst reset -> rst Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
5 years ago
set_property -dict {PACKAGE_PIN C12 IOSTANDARD LVCMOS33} [get_ports ext_rst]
Add constraint file for Nexys A7
5 years ago
set_property -dict {PACKAGE_PIN D4 IOSTANDARD LVCMOS33} [get_ports uart0_txd]
set_property -dict {PACKAGE_PIN C4 IOSTANDARD LVCMOS33} [get_ports uart0_rxd]