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26 lines
661 B
Markdown
26 lines
661 B
Markdown
# General Notes
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## SDR/DDR
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* logical wrappers instantiate hard array
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* SDR: use multiple hard array instances to add ports
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* DDR: use early/late pulses to double read/write ports
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### DDR Implementation
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* strobes are generated from clk based on configurable delay parameters
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## Test site arrays
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* 2R1W, SDR - this is the sdr hard array and simple logical wrapper using single clock
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* 4R2W, DDR - this is the ddr hard array and double-rate logical wrapper generating early/late pulses
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### Configuration options
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* SDR clock frequency (external to logical array)
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* DDR clock frequency (external to logical array)
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* SDR Pulse Control
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* DDR Pulse Control
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