netlist sim.txt, .fst

master
openpowerwtf 2 years ago
parent d99566f402
commit f46f717930

@ -1,6 +1,6 @@
<testsuites name="results">
<testsuite name="all" package="all">
<property name="random_seed" value="1667950274" />
<testcase name="tb" classname="tb_ra_64x72" file="/data/projects/toy-sram/rtl/sim/coco/tb_ra_64x72.py" lineno="291" time="57.49161696434021" sim_time_ns="50089.001" ratio_time="871.2400806376386" />
<property name="random_seed" value="8675309" />
<testcase name="tb" classname="tb_ra_64x72" file="/data/projects/toy-sram/rtl/sim/coco/tb_ra_64x72.py" lineno="291" time="83.82325267791748" sim_time_ns="50089.001" ratio_time="597.5549671457156" />
</testsuite>
</testsuites>

@ -1,6 +1,9 @@
rm -f -r sim_build
rm -f results.xml
make -f Makefile_64x72_shard results.xml
make[1]: Entering directory '/data/projects/toy-sram/rtl/sim/coco'
mkdir -p sim_build
/usr/local/bin/iverilog -o sim_build/sim.vvp -D COCOTB_SIM=1 -s tb_ra_64x72_2r1w -Isrc/array_shard -ysrc/array_shard -f sim_build/cmds.f -g2012 ./tb_ra_64x72_2r1w.v src/array_shard/wordlines_comp.v src/array_shard/sky130_hd.v src/array_shard/sky130_fd.v
rm -f results.xml
MODULE=tb_ra_64x72 TESTCASE=tb TOPLEVEL=tb_ra_64x72_2r1w TOPLEVEL_LANG=verilog \
/usr/local/bin/vvp -M /home/wtf/.local/lib/python3.10/site-packages/cocotb/libs -m libcocotbvpi_icarus sim_build/sim.vvp
@ -100270,11 +100273,13 @@ Writes Port 0: 19944
50089.00ns INFO cocotb.regression **************************************************************************************
** TEST STATUS SIM TIME (ns) REAL TIME (s) RATIO (ns/s) **
**************************************************************************************
** tb_ra_64x72.tb PASS 50089.00 43.36 1155.23 **
** tb_ra_64x72.tb PASS 50089.00 83.82 597.55 **
**************************************************************************************
** TESTS=1 PASS=1 FAIL=0 SKIP=0 50089.00 43.52 1151.03 **
** TESTS=1 PASS=1 FAIL=0 SKIP=0 50089.00 83.98 596.43 **
**************************************************************************************
VCD info: dumpfile tb_ra_64x72.vcd opened for output.
VCD warning: $dumpvars: Package ($unit) is not dumpable with VCD.
make[1]: Leaving directory '/data/projects/toy-sram/rtl/sim/coco'
vcd2fst tb_ra_64x72.vcd tb_ra_64x72.fst
rm tb_ra_64x72.vcd

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