19 Commits (1d8916f2dfee83b8cf28ab2020b5447f9c27b5c5)

Author SHA1 Message Date
Jean-François Nguyen 28becc090c pfv: add gpr_width parameter to explore designs with 32-bit GPRs. 2 years ago
Jean-François Nguyen 331e4b76ba insn: use records to define instruction encodings.
Before this commit, instructions were defined by a sequence of Const
for fixed fields (e.g. PO/XO) and AnyConst for others (e.g. operands).
This approach restricted their use to BMC use-cases, and prevented them
from appearing in VCD traces.

After this commit, an instruction encoding is defined by a Record. As
fields can now be set to arbitrary values, the corresponding InsnSpec
will only assert `pfv.stb` if `pfv.insn` matches a valid encoding (i.e.
fixed fields have correct values). On the other side, BMC testbenches
will drive `pfv.insn` with an AnyConst, and assume `pfv.stb` is high.
2 years ago
Jean-François Nguyen a325393c42 Add checks for multiplication/division instructions. 2 years ago
Jean-François Nguyen b3255def24 Add checks for CMPRB and CMPEQB instructions. 2 years ago
Jean-François Nguyen d3546e4362 insn.spec: implement some interrupts (program,alignment,system call). 2 years ago
Jean-François Nguyen 2e29794b7d check.insn: use DUT parameters to configure the spec pfv.Interface. 2 years ago
Jean-François Nguyen c16e678c49 Add a --exclude parameter to the check command.
Also, remove the expand command; when a group of checks is selected by
the 'check' command, its members are immediately added to the session.
2 years ago
Jean-François Nguyen 7b7aa6cc9b Add checks for CR Move / Set Boolean instructions. 2 years ago
Jean-François Nguyen b579665d7a Add checks for Trap instructions. 2 years ago
Jean-François Nguyen 0038f3fff5 Add check for System Call instruction. 2 years ago
Jean-François Nguyen ae76adefbf Add checks for Byte-Reverse instructions. 2 years ago
Jean-François Nguyen 4bf2398208 Add checks for BCD Assist instructions. 2 years ago
Jean-François Nguyen 23dcd80a9e Add checks for Rotate/Shift instructions. 2 years ago
Jean-François Nguyen aeed09092c Add checks for logical instructions. 2 years ago
Jean-François Nguyen 373a4e28b6 pfv.Interface: add support for skipping instructions.
The `pfv.skip` signal is used to handle cases where the DUT does not
actually execute an instruction (e.g. a no-op), which may prevent some
side-effects (e.g. GPR accesses) from being observable.
2 years ago
Jean-François Nguyen 0f731db18a Add checks for Load/Store instructions. 2 years ago
Jean-François Nguyen 5d21832c57 pfv.Interface: simplify memory port.
The former `pfv.insn_mem` field was redundant with `pfv.insn` and
`pfv.cia`.

Also, validate memory port properties in InsnTestbench.
2 years ago
Jean-François Nguyen a5e69954a4 Add checks for MTMSR/MFMSR instructions. 2 years ago
Jean-François Nguyen dd6048f14b In-depth refactoring, improved user interface.
* A PowerFVSession class provides a REPL interface. Functionality is
  split into commands (e.g. add checks, build) which can be provided
  interactively or from a file.

  See cores/microwatt for an example of its integration.

* Instruction specifications are now separated from verification
  testbenches.

  An InsnSpec class provides a behavioral model using the same PowerFV
  interface as a core. This interface is output-only for a core, but
  bidirectional for the InsnSpec:
    - fields related to context (e.g. read data) are inputs,
    - fields related to side-effects (e.g. write strobes) are outputs.

  The testbench is responsible for driving inputs to the same values
  as the core, then check outputs for equivalence. This decoupling
  provides a path towards using PowerFV in simulation.

* Instruction encodings are now defined by their fields, not their
  format (which was problematic e.g. X-form has dozens of variants).

  Field declarations can be preset to a value, or left undefined. In
  the latter case, they are implicitly cast to AnyConst (which is
  useful for arbitrary values like immediates).
2 years ago