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microwatt/litedram/generated/nexys-video
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Benjamin Herrenschmidt 6fe077910b litedram: Add simulation support 
This adds a simulated litedram model along with the necessary
Makefile gunk to verilate it and wrap it for use by ghdl.

The core_dram_tb test bench is a variant of core_tb with
LiteDRAM simulated. It's not built by default, an explicit

make core_dram_tb

is necessary as to not require verilator to be installed for
the normal build process (also it's slow'ish).

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
 		4 years ago
..
init-cpu.txt litedram: Add simulation support 4 years ago
litedram-initmem.vhdl litedram: Split the init memory from the main wrapper 4 years ago
litedram_core.init litedram: Add simulation support 4 years ago
litedram_core.v litedram: Add simulation support 4 years ago