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233 lines
8.3 KiB
C
233 lines
8.3 KiB
C
//--------------------------------------------------------------------------------
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// Auto-generated by Migen (--------) & LiteX (--------) on 2022-02-07 17:23:11
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//--------------------------------------------------------------------------------
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#include <generated/soc.h>
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#ifndef __GENERATED_CSR_H
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#define __GENERATED_CSR_H
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#include <stdint.h>
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#include <system.h>
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#ifndef CSR_ACCESSORS_DEFINED
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#include <hw/common.h>
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#endif /* ! CSR_ACCESSORS_DEFINED */
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#ifndef CSR_BASE
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#define CSR_BASE 0x0L
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#endif
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/* uart */
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#define CSR_UART_BASE (CSR_BASE + 0x0L)
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#define CSR_UART_RXTX_ADDR (CSR_BASE + 0x0L)
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#define CSR_UART_RXTX_SIZE 1
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static inline uint32_t uart_rxtx_read(void) {
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return csr_read_simple(CSR_BASE + 0x0L);
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}
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static inline void uart_rxtx_write(uint32_t v) {
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csr_write_simple(v, CSR_BASE + 0x0L);
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}
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#define CSR_UART_TXFULL_ADDR (CSR_BASE + 0x4L)
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#define CSR_UART_TXFULL_SIZE 1
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static inline uint32_t uart_txfull_read(void) {
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return csr_read_simple(CSR_BASE + 0x4L);
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}
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#define CSR_UART_RXEMPTY_ADDR (CSR_BASE + 0x8L)
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#define CSR_UART_RXEMPTY_SIZE 1
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static inline uint32_t uart_rxempty_read(void) {
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return csr_read_simple(CSR_BASE + 0x8L);
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}
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#define CSR_UART_EV_STATUS_ADDR (CSR_BASE + 0xcL)
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#define CSR_UART_EV_STATUS_SIZE 1
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static inline uint32_t uart_ev_status_read(void) {
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return csr_read_simple(CSR_BASE + 0xcL);
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}
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#define CSR_UART_EV_STATUS_TX_OFFSET 0
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#define CSR_UART_EV_STATUS_TX_SIZE 1
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static inline uint32_t uart_ev_status_tx_extract(uint32_t oldword) {
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uint32_t mask = ((1 << 1)-1);
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return ( (oldword >> 0) & mask );
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}
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static inline uint32_t uart_ev_status_tx_read(void) {
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uint32_t word = uart_ev_status_read();
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return uart_ev_status_tx_extract(word);
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}
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#define CSR_UART_EV_STATUS_RX_OFFSET 1
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#define CSR_UART_EV_STATUS_RX_SIZE 1
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static inline uint32_t uart_ev_status_rx_extract(uint32_t oldword) {
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uint32_t mask = ((1 << 1)-1);
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return ( (oldword >> 1) & mask );
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}
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static inline uint32_t uart_ev_status_rx_read(void) {
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uint32_t word = uart_ev_status_read();
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return uart_ev_status_rx_extract(word);
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}
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#define CSR_UART_EV_PENDING_ADDR (CSR_BASE + 0x10L)
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#define CSR_UART_EV_PENDING_SIZE 1
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static inline uint32_t uart_ev_pending_read(void) {
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return csr_read_simple(CSR_BASE + 0x10L);
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}
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static inline void uart_ev_pending_write(uint32_t v) {
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csr_write_simple(v, CSR_BASE + 0x10L);
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}
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#define CSR_UART_EV_PENDING_TX_OFFSET 0
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#define CSR_UART_EV_PENDING_TX_SIZE 1
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static inline uint32_t uart_ev_pending_tx_extract(uint32_t oldword) {
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uint32_t mask = ((1 << 1)-1);
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return ( (oldword >> 0) & mask );
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}
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static inline uint32_t uart_ev_pending_tx_read(void) {
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uint32_t word = uart_ev_pending_read();
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return uart_ev_pending_tx_extract(word);
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}
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static inline uint32_t uart_ev_pending_tx_replace(uint32_t oldword, uint32_t plain_value) {
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uint32_t mask = ((1 << 1)-1);
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return (oldword & (~(mask << 0))) | (mask & plain_value)<< 0 ;
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}
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static inline void uart_ev_pending_tx_write(uint32_t plain_value) {
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uint32_t oldword = uart_ev_pending_read();
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uint32_t newword = uart_ev_pending_tx_replace(oldword, plain_value);
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uart_ev_pending_write(newword);
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}
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#define CSR_UART_EV_PENDING_RX_OFFSET 1
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#define CSR_UART_EV_PENDING_RX_SIZE 1
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static inline uint32_t uart_ev_pending_rx_extract(uint32_t oldword) {
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uint32_t mask = ((1 << 1)-1);
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return ( (oldword >> 1) & mask );
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}
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static inline uint32_t uart_ev_pending_rx_read(void) {
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uint32_t word = uart_ev_pending_read();
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return uart_ev_pending_rx_extract(word);
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}
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static inline uint32_t uart_ev_pending_rx_replace(uint32_t oldword, uint32_t plain_value) {
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uint32_t mask = ((1 << 1)-1);
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return (oldword & (~(mask << 1))) | (mask & plain_value)<< 1 ;
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}
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static inline void uart_ev_pending_rx_write(uint32_t plain_value) {
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uint32_t oldword = uart_ev_pending_read();
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uint32_t newword = uart_ev_pending_rx_replace(oldword, plain_value);
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uart_ev_pending_write(newword);
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}
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#define CSR_UART_EV_ENABLE_ADDR (CSR_BASE + 0x14L)
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#define CSR_UART_EV_ENABLE_SIZE 1
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static inline uint32_t uart_ev_enable_read(void) {
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return csr_read_simple(CSR_BASE + 0x14L);
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}
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static inline void uart_ev_enable_write(uint32_t v) {
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csr_write_simple(v, CSR_BASE + 0x14L);
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}
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#define CSR_UART_EV_ENABLE_TX_OFFSET 0
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#define CSR_UART_EV_ENABLE_TX_SIZE 1
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static inline uint32_t uart_ev_enable_tx_extract(uint32_t oldword) {
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uint32_t mask = ((1 << 1)-1);
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return ( (oldword >> 0) & mask );
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}
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static inline uint32_t uart_ev_enable_tx_read(void) {
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uint32_t word = uart_ev_enable_read();
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return uart_ev_enable_tx_extract(word);
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}
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static inline uint32_t uart_ev_enable_tx_replace(uint32_t oldword, uint32_t plain_value) {
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uint32_t mask = ((1 << 1)-1);
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return (oldword & (~(mask << 0))) | (mask & plain_value)<< 0 ;
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}
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static inline void uart_ev_enable_tx_write(uint32_t plain_value) {
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uint32_t oldword = uart_ev_enable_read();
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uint32_t newword = uart_ev_enable_tx_replace(oldword, plain_value);
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uart_ev_enable_write(newword);
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}
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#define CSR_UART_EV_ENABLE_RX_OFFSET 1
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#define CSR_UART_EV_ENABLE_RX_SIZE 1
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static inline uint32_t uart_ev_enable_rx_extract(uint32_t oldword) {
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uint32_t mask = ((1 << 1)-1);
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return ( (oldword >> 1) & mask );
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}
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static inline uint32_t uart_ev_enable_rx_read(void) {
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uint32_t word = uart_ev_enable_read();
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return uart_ev_enable_rx_extract(word);
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}
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static inline uint32_t uart_ev_enable_rx_replace(uint32_t oldword, uint32_t plain_value) {
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uint32_t mask = ((1 << 1)-1);
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return (oldword & (~(mask << 1))) | (mask & plain_value)<< 1 ;
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}
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static inline void uart_ev_enable_rx_write(uint32_t plain_value) {
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uint32_t oldword = uart_ev_enable_read();
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uint32_t newword = uart_ev_enable_rx_replace(oldword, plain_value);
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uart_ev_enable_write(newword);
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}
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#define CSR_UART_TUNING_WORD_ADDR (CSR_BASE + 0x18L)
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#define CSR_UART_TUNING_WORD_SIZE 1
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static inline uint32_t uart_tuning_word_read(void) {
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return csr_read_simple(CSR_BASE + 0x18L);
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}
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static inline void uart_tuning_word_write(uint32_t v) {
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csr_write_simple(v, CSR_BASE + 0x18L);
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}
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#define CSR_UART_CONFIGURED_ADDR (CSR_BASE + 0x1cL)
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#define CSR_UART_CONFIGURED_SIZE 1
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static inline uint32_t uart_configured_read(void) {
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return csr_read_simple(CSR_BASE + 0x1cL);
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}
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static inline void uart_configured_write(uint32_t v) {
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csr_write_simple(v, CSR_BASE + 0x1cL);
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}
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/* ctrl */
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#define CSR_CTRL_BASE (CSR_BASE + 0x800L)
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#define CSR_CTRL_RESET_ADDR (CSR_BASE + 0x800L)
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#define CSR_CTRL_RESET_SIZE 1
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static inline uint32_t ctrl_reset_read(void) {
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return csr_read_simple(CSR_BASE + 0x800L);
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}
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static inline void ctrl_reset_write(uint32_t v) {
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csr_write_simple(v, CSR_BASE + 0x800L);
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}
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#define CSR_CTRL_RESET_SOC_RST_OFFSET 0
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#define CSR_CTRL_RESET_SOC_RST_SIZE 1
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static inline uint32_t ctrl_reset_soc_rst_extract(uint32_t oldword) {
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uint32_t mask = ((1 << 1)-1);
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return ( (oldword >> 0) & mask );
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}
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static inline uint32_t ctrl_reset_soc_rst_read(void) {
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uint32_t word = ctrl_reset_read();
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return ctrl_reset_soc_rst_extract(word);
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}
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static inline uint32_t ctrl_reset_soc_rst_replace(uint32_t oldword, uint32_t plain_value) {
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uint32_t mask = ((1 << 1)-1);
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return (oldword & (~(mask << 0))) | (mask & plain_value)<< 0 ;
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}
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static inline void ctrl_reset_soc_rst_write(uint32_t plain_value) {
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uint32_t oldword = ctrl_reset_read();
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uint32_t newword = ctrl_reset_soc_rst_replace(oldword, plain_value);
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ctrl_reset_write(newword);
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}
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#define CSR_CTRL_RESET_CPU_RST_OFFSET 1
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#define CSR_CTRL_RESET_CPU_RST_SIZE 1
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static inline uint32_t ctrl_reset_cpu_rst_extract(uint32_t oldword) {
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uint32_t mask = ((1 << 1)-1);
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return ( (oldword >> 1) & mask );
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}
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static inline uint32_t ctrl_reset_cpu_rst_read(void) {
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uint32_t word = ctrl_reset_read();
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return ctrl_reset_cpu_rst_extract(word);
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}
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static inline uint32_t ctrl_reset_cpu_rst_replace(uint32_t oldword, uint32_t plain_value) {
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uint32_t mask = ((1 << 1)-1);
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return (oldword & (~(mask << 1))) | (mask & plain_value)<< 1 ;
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}
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static inline void ctrl_reset_cpu_rst_write(uint32_t plain_value) {
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uint32_t oldword = ctrl_reset_read();
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uint32_t newword = ctrl_reset_cpu_rst_replace(oldword, plain_value);
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ctrl_reset_write(newword);
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}
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#define CSR_CTRL_SCRATCH_ADDR (CSR_BASE + 0x804L)
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#define CSR_CTRL_SCRATCH_SIZE 1
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static inline uint32_t ctrl_scratch_read(void) {
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return csr_read_simple(CSR_BASE + 0x804L);
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}
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static inline void ctrl_scratch_write(uint32_t v) {
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csr_write_simple(v, CSR_BASE + 0x804L);
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}
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#define CSR_CTRL_BUS_ERRORS_ADDR (CSR_BASE + 0x808L)
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#define CSR_CTRL_BUS_ERRORS_SIZE 1
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static inline uint32_t ctrl_bus_errors_read(void) {
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return csr_read_simple(CSR_BASE + 0x808L);
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}
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#endif
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