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Paul Mackerras 21ed730514 arty_a7: Add litesdcard interface ... This adds litesdcard.v generated from the litex/litesdcard project, along with logic in top-arty.vhdl to connect it into the system. There is now a DMA wishbone coming in to soc.vhdl which is narrower than the other wishbone masters (it has 32-bit data rather than 64-bit) so there is a widening/narrowing adapter between it and the main wishbone master arbiter. Also, litesdcard generates a non-pipelined wishbone for its DMA connection, which needs to be converted to a pipelined wishbone. We have a latch on both the incoming and outgoing sides of the wishbone in order to help make timing (at the cost of two extra cycles of latency). litesdcard generates an interrupt signal which is wired up to input 3 of the ICS (IRQ 19). Signed-off-by: Paul Mackerras <paulus@ozlabs.org>		4 years ago
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LICENSE	Initial import of microwatt	5 years ago
acorn-cle-215.xdc	acorn: Add support for the Acorn CLE 215+	4 years ago
arty_a7.xdc	arty_a7: Add litesdcard interface	4 years ago
clk_gen_bypass.vhd	Fix clk_gen_bypass	5 years ago
clk_gen_ecp5.vhd	Add PLL for ECP5 device	5 years ago
clk_gen_mcmm.vhd	Improve PLL/MMCM clocks configuration	5 years ago
clk_gen_plle2.vhd	acorn: Add support for the Acorn CLE 215+	4 years ago
cmod_a7-35.xdc	Add SPI configuration to Xilinx constraint files	5 years ago
firmware.hex	Add a few more FPGA related files	5 years ago
fpga-random.vhdl	Add random number generator and implement the darn instruction	4 years ago
fpga-random.xdc	Add random number generator and implement the darn instruction	4 years ago
genesys2.xdc	fpga: Add support for Genesys2	4 years ago
hello_world.hex	hello_world: Use new headers and frequency from syscon	5 years ago
main_bram.vhdl	Fix some ghdlsynth issues with fpga_bram	5 years ago
nexys-video.xdc	spi: Add SPI Flash controller	5 years ago
nexys_a7.xdc	Add SPI configuration to Xilinx constraint files	5 years ago
pp_fifo.vhd	pp_fifo: Fix full fifo losing all data on simultaneous push & pop	5 years ago
pp_soc_uart.vhd	uart: Remove combinational loops on ack and stall signal	5 years ago
pp_utilities.vhd	Initial import of microwatt	5 years ago
soc_reset.vhdl	soc_reset: Use counters, add synchronizers	5 years ago
soc_reset_tb.vhdl	Exit cleanly from testbench on success	5 years ago
top-acorn-cle-215.vhdl	acorn: Add support for the Acorn CLE 215+	4 years ago
top-arty.vhdl	arty_a7: Add litesdcard interface	4 years ago
top-generic.vhdl	fetch1: Implement a simple branch target cache	4 years ago
top-genesys2.vhdl	fpga: Add support for Genesys2	4 years ago
top-nexys-video.vhdl	fetch1: Implement a simple branch target cache	4 years ago