A tiny Open POWER ISA softcore written in VHDL 2008
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Paul Mackerras 0cdaa2778f xilinx-mult: Move some registers later in the data flow
This changes s0 to use the P register rather than the A/B/C input
registers, thus improving the timing of the multiplier output.  The
m00, m02 and m03 multipliers now use their P registers rather than the
M registers, moving the addition they do from the second cycle to the
first.

Also, the XOR that inverts the 32 LSBs is moved before the output
register.

Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
3 years ago
.github/workflows ci: Add verilator tests 3 years ago
constraints
fpga Merge pull request #316 from antonblanchard/verilator-fix 3 years ago
hello_world
include arty_a7: Add litesdcard interface 4 years ago
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litedram litedram: Regenerate from upstream litex 3 years ago
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micropython
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scripts makefile: Add some verilator micropython tests 3 years ago
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uart16550
verilator verilator: Specify top level module 3 years ago
.gitignore
LICENSE Initial import of microwatt 5 years ago
Makefile makefile: Check environment for MEMORY_SIZE/RAM_INIT_FILE 3 years ago
README.md Update documentation. (#280) 4 years ago
cache_ram.vhdl Reformat cache_ram 4 years ago
common.vhdl PMU: Add several more events 3 years ago
control.vhdl Reformat control 4 years ago
core.vhdl PMU: Add several more events 3 years ago
core_debug.vhdl Fix some whitespace issues 3 years ago
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crhelpers.vhdl
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execute1.vhdl core: Fix mcrxrx, addpcis and bpermd 3 years ago
fetch1.vhdl
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glibc_random.vhdl
glibc_random_helpers.vhdl
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mmu.vhdl MMU: Implement a vestigial partition table 3 years ago
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sim_console.vhdl
sim_console_c.c
sim_jtag.vhdl
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sim_jtag_socket_c.c
sim_no_flash.vhdl
sim_pp_uart.vhdl
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sim_vhpi_c.h
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spi_rxtx.vhdl
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syscon.vhdl arty_a7: Add litesdcard interface 4 years ago
utils.vhdl
wishbone_arbiter.vhdl
wishbone_bram_tb.bin
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README.md

Microwatt

Microwatt

A tiny Open POWER ISA softcore written in VHDL 2008. It aims to be simple and easy to understand.

Simulation using ghdl

MicroPython running on Microwatt

You can try out Microwatt/Micropython without hardware by using the ghdl simulator. If you want to build directly for a hardware target board, see below.

  • Build micropython. If you aren't building on a ppc64le box you will need a cross compiler. If it isn't available on your distro grab the powerpc64le-power8 toolchain from https://toolchains.bootlin.com. You may need to set the CROSS_COMPILE environment variable to the prefix used for your cross compilers. The default is powerpc64le-linux-gnu-.
git clone https://github.com/micropython/micropython.git
cd micropython
cd ports/powerpc
make -j$(nproc)
cd ../../../

A prebuilt micropython image is also available in the micropython/ directory.

  • Microwatt uses ghdl for simulation. Either install this from your distro or build it. Microwatt requires ghdl to be built with the LLVM or gcc backend, which not all distros do (Fedora does, Debian/Ubuntu appears not to). ghdl with the LLVM backend is likely easier to build.

    If building ghdl from scratch is too much for you, the microwatt Makefile supports using Docker or Podman.

  • Next build microwatt:

git clone https://github.com/antonblanchard/microwatt
cd microwatt
make

To build using Docker:

make DOCKER=1

and to build using Podman:

make PODMAN=1
  • Link in the micropython image:
ln -s ../micropython/ports/powerpc/build/firmware.bin main_ram.bin

Or if you were using the pre-built image:

ln -s micropython/firmware.bin main_ram.bin
  • Now run microwatt, sending debug output to /dev/null:
./core_tb > /dev/null

Synthesis on Xilinx FPGAs using Vivado

  • Install Vivado (I'm using the free 2019.1 webpack edition).

  • Setup Vivado paths:

source /opt/Xilinx/Vivado/2019.1/settings64.sh
  • Install FuseSoC:
pip3 install --user -U fusesoc

Fedora users can get FuseSoC package via

sudo dnf copr enable sharkcz/danny
sudo dnf install fusesoc
  • If this is your first time using fusesoc, initialize fusesoc. This is needed to be able to pull down fussoc library components referenced by microwatt. Run
fusesoc init
  • Create a working directory and point FuseSoC at microwatt:
mkdir microwatt-fusesoc
cd microwatt-fusesoc
fusesoc library add microwatt /path/to/microwatt/
  • Build using FuseSoC. For hello world (Replace nexys_video with your FPGA board such as --target=arty_a7-100): You may wish to ensure you have installed Digilent Board files or appropriate files for your board first.
fusesoc run --target=nexys_video microwatt --memory_size=16384 --ram_init_file=/path/to/microwatt/fpga/hello_world.hex

You should then be able to see output via the serial port of the board (/dev/ttyUSB1, 115200 for example assuming standard clock speeds). There is a know bug where initial output may not be sent - try the reset (not programming button) on your board if you don't see anything.

  • To build micropython (currently requires 1MB of BRAM eg an Artix-7 A200):
fusesoc run --target=nexys_video microwatt

Testing

  • A simple test suite containing random execution test cases and a couple of micropython test cases can be run with:
make -j$(nproc) check

Issues

This is functional, but very simple. We still have quite a lot to do:

  • There are a few instructions still to be implemented
  • Need to add caches and bypassing (in progress)
  • Need to add supervisor state (in progress)