cores
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microwatt
mirror of https://github.com/antonblanchard/microwatt
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caravel-mpw7-20221125
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trace-test
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litedram-update
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Commit Graph

55 Commits (cc10f6b2892e2790726511d6d450405d27111fce)

Author SHA1 Message Date
riktw 4ebd6fc1f7 Added support for building for Arty A7 boards 6 years ago
Olof Kindgren 12327034d6 Add and use plle2 primitive for nexys boards 6 years ago
Olof Kindgren b9bf19f912 Added synthesis target 
The synth target can be used to analyze the core after synthesis
without running P&R. Currently, the only edalize backends that
support synthesis without P&R are vivado and icestorm, and icestorm
needs yosys built with verific support to parse vhdl.

To run synthesis only for a part, run

fusesoc run --target=synth --tool=vivado microwatt --part=<part>

where part is a valid Xilinx part such as xc7a100tcsg324-1
 6 years ago
Olof Kindgren 250d09ed2d Add Nexys Video support 6 years ago
Olof Kindgren 5e56b14125 Add FuseSoC core description file with Nexys A7 support 6 years ago