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caravel-mpw7-20221125
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branch-alias
trace-test
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litedram-update
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fix-sdcard
fpu-init
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core_debug-init
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fpu-typo
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caravel-mpw6-20220530
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alt-reset-address
log2ceil-issue
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asic-3
boxarty-20211011
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remove-potato-uart
cache-tlb-parameters-2
caravel-20210114
caravel-20210105
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1 Commits (4d7143bf6bef44d677f1dabaf5dce092e66b451f)

Author SHA1 Message Date
Michael Neuling aae45583d7 Add uart16550 files from fusesoc 
These are needed for synthesis that doesn't use fusesoc natively.

These were pulled in via 'fusesoc fetch ::uart16550:1.5.5-r1'

Signed-off-by: Michael Neuling <mikey@neuling.org>
 5 years ago