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caravel-mpw7-20221125
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2 Commits (1a244d34707af829e5967e24c70d04099ece41f7)

Author SHA1 Message Date
Paul Mackerras e08ca4ab8e countzero: Add a register to help make timing 
This adds a register in the middle of the countzero computation,
so that we now have two cycles to count leading or trailing zeroes
instead of just one.  Execute1 now outputs a one-cycle stall signal
when it encounters a cntlz* or cnttz* instruction.  With this,
the countzero path no longer fails timing on the Artix-7 at 100MHz.

Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
 5 years ago
Paul Mackerras 4396eddc31 countzero: Add a testbench 
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
 5 years ago