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caravel-mpw7-20221125
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trace-test
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litedram-update
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2 Commits (166e3f4ab2b2acc36aff9a500763b4d050e4011f)

Author SHA1 Message Date
Benjamin Herrenschmidt d299ea925e Bundle the uart16550 core file 
We already carry the UART verilog source, so we may as well use it
instead of requiring fusesoc to import it from its library

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
 2 years ago
Michael Neuling aae45583d7 Add uart16550 files from fusesoc 
These are needed for synthesis that doesn't use fusesoc natively.

These were pulled in via 'fusesoc fetch ::uart16550:1.5.5-r1'

Signed-off-by: Michael Neuling <mikey@neuling.org>
 5 years ago