Starting from 5e7612eb4, OpenOCD identifies itself as 0.12.
This causes Microwatt's flash-arty script to fail. Because neither
the cfg nor the proxy bitstream are affected, we can keep treating
everything as indistinguishable from 0.11. This patch simply tests
for "0.12" as an alias; it would probably be better to replace this
confusing terminology with something like "single-tap/multi-tap".
Signed-off-by: Boris Shingarov <shingarov@labware.com>
This includes the cable configuration, additions to the Python script,
and the jtagspi proxy bitstream. The single-tap version is not included
because 0.10 supported only 3-byte addresses which is unusable on the
s25fl256s anyway.
Signed-off-by: Boris Shingarov <shingarov@labware.com>
The Antmicro Artix DC-SCM uses the following FTDI part:
0403:6011 Future Technology Devices International, Ltd FT4232H Quad HS USB-UART/FIFO IC
To use:
$ openocd/flash-arty -c antmicro-artix-dc-scm -f a100 -t bin -a 0x300000 ~/u-boot
Signed-off-by: Joel Stanley <joel@jms.id.au>
The protocol used by the spi bridge firmware changed as of openocd
v0.11. As this is the version packaged by Debian Bullseye, add the
firmware for convince.
Signed-off-by: Joel Stanley <joel@jms.id.au>
The changes in d3c274d01e ("flash-arty: Add support for specifying the file type")
added a local jtagspi.cfg, which meant openocd must be run from the root
of the microwatt directory.
This puts the content into the xilinx-xc7.cfg so the script can be used
from any path again.
Signed-off-by: Joel Stanley <joel@jms.id.au>
By default openocd tries to "guess" the file type and interpret
it accordingly. For example it will detect an ELF file based on
the presence of an ELF header and will try to load the relevant
segments into the flash.
This may not be what we want. For example, I want to load the raw
ELF file into the flash.
Additionally the ELF parser in most distro's OpenOCD version
only supports ELF32 and will error out.
This adds a "-t" argument to flash-arty to allow us to specify the
file format. For example "-t bin" will treat the file as raw binary.
Unfortunately I had to copy and modify jtagspi.cfg from OpenOCD
to achieve this.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
You must have openocd 0.10.0 installed.
$ ./openocd/flash-arty ~/microwatt-fusesoc/build/microwatt_0/arty_a7-35-vivado/microwatt_0.bit
Open On-Chip Debugger 0.10.0
Licensed under GNU GPL v2
For bug reports, read
http://openocd.org/doc/doxygen/bugs.html
none separate
Info : auto-selecting first available session transport "jtag". To override use 'transport select <transport>'.
adapter speed: 25000 kHz
fpga_program
Info : ftdi: if you experience problems at higher adapter clocks, try the command "ftdi_tdo_sample_edge falling"
Info : clock speed 25000 kHz
Info : JTAG tap: xc7.tap tap/device found: 0x0362d093 (mfg: 0x049 (Xilinx), part: 0x362d, ver: 0x0)
loaded file microwatt/openocd/bscan_spi_xc7a35t.bit to pld device 0 in 0s 136459us
Info : JTAG tap: xc7.tap tap/device found: 0x0362d093 (mfg: 0x049 (Xilinx), part: 0x362d, ver: 0x0)
Info : Found flash device 'micron n25q128' (ID 0x0018ba20)
flash 'jtagspi' found at 0x00000000
auto erase enabled
Info : Found flash device 'micron n25q128' (ID 0x0018ba20)
Info : Found flash device 'micron n25q128' (ID 0x0018ba20)
Info : Found flash device 'micron n25q128' (ID 0x0018ba20)
Info : sector 0 took 241 ms
Info : sector 1 took 242 ms
Info : sector 2 took 241 ms
Info : sector 3 took 247 ms
Info : sector 4 took 253 ms
Info : sector 5 took 244 ms
Info : sector 6 took 246 ms
Info : sector 7 took 237 ms
Info : sector 8 took 258 ms
Info : sector 9 took 260 ms
Info : sector 10 took 262 ms
Info : sector 11 took 253 ms
Info : sector 12 took 256 ms
Info : sector 13 took 255 ms
wrote 917504 bytes from file microwatt-fusesoc/build/microwatt_0/arty_a7-35-vivado/microwatt_0.bit in 9.642746s (92.920 KiB/s)
Info : Found flash device 'micron n25q128' (ID 0x0018ba20)
read 907483 bytes from file microwatt-fusesoc/build/microwatt_0/arty_a7-35-vivado/microwatt_0.bit and flash bank 0 at offset 0x00000000 in 0.557387s (1589.944 KiB/s)
contents match
Signed-off-by: Joel Stanley <joel@jms.id.au>
A first pass at ghdl synthesis using yosys and nextpnr. It runs hello world
or micropython if the FPGA has enough block RAM (eg ECP5 85F). The hello
world testcase also loops UART rx to tx in software (ie not a hardware
loopback).
It uses Docker images, so no software needs to be installed. If you prefer
podman you can use that too. Edit Makefile.synth to configure your FPGA,
JTAG device etc.
To build:
make -f Makefile.synth
and to program:
make -f Makefile.synth prog
A few issues:
We need to add PLL support. Right now Microwatt runs at whatever the
external clock frequency is and the baud rate gets scaled by how far off
50MHz it is. This means on the ecp5-evn with a 12 MHz clock rate the baud
rate is a quite strange 27650 (115200 * 50 / 12). On my OrangeCrab with a
50MHz clock the UART is 115200.
It uses a large amount of resources, way more than it should. There are
still some ghdl/yosys issues to be sorted out.
Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
Michael Neuling
Boris Shingarov