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3 Commits (master)

Author SHA1 Message Date
Paul Mackerras 264e609fd4 litesdcard: Name targets by vendor.frequency, not just vendor 
In future we will want to support targets using the same vendor but
running at different clock frequencies.  Since the clock frequency is
a parameter to the gateware generation process, we now name the target
directories as "vendor.frequency", i.e., "xilinx.100e6" and
"lattice.48e6" rather than "xilinx" and "lattice".

Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
 2 months ago
Anton Blanchard 83fe8b629c litesdcard: Fix and regenerate Verilog 
Fix the litex generate script to pass frequencies in Hz. Regenerate
the litesdcard Verilog for both Xilinx and Lattice. This fixes
litesdcard on my Nexys Video.

Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
 2 years ago
Matt Johnston 42959184dd litesdcard: add lattice, regenerate 
Modifies litescard generate script to take a clock speed.

Regenerated verilog with latest litesdcard
e52c731 ("Bump year.")

Signed-off-by: Matt Johnston <matt@codeconstruct.com.au>
 2 years ago