execute1: Make it clear that divide logic is not included when HAS_FPU=true

This adds a "not HAS_FPU" condition in a few places to make it obvious
that logic to interface to the divide unit is not included when we
have an FPU.

Signed-off-by: Paul Mackerras <paulus@ozlabs.org>

execute1.vhdl

@@ -699,6 +699,7 @@ begin
         x_to_multiply.addend <= addend;
 
         -- Interface to divide unit
+        if not HAS_FPU then
             sign1 := '0';
             sign2 := '0';
             if e_in.is_signed = '1' then
@@ -748,6 +749,7 @@ begin
                 end if;
                 x_to_divider.divisor <= x"00000000" & std_ulogic_vector(abs2(31 downto 0));
             end if;
+        end if;
 
         -- signals to 32-bit multiplier
         x_to_mult_32s.data1 <= 32x"0" & a_in(31 downto 0);
@@ -1486,7 +1488,7 @@ begin
             end if;
         end if;
 
-        if ex1.div_in_progress = '1' then
+        if not HAS_FPU and ex1.div_in_progress = '1' then
             v.div_in_progress := not divider_to_x.valid;
             v.busy := not divider_to_x.valid;
             if divider_to_x.valid = '1' and ex1.oe = '1' then