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@ -53,10 +53,7 @@ architecture behaviour of decode2 is
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function decode_input_reg_a (t : input_reg_a_t; insn_in : std_ulogic_vector(31 downto 0);
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function decode_input_reg_a (t : input_reg_a_t; insn_in : std_ulogic_vector(31 downto 0);
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reg_data : std_ulogic_vector(63 downto 0)) return decode_input_reg_t is
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reg_data : std_ulogic_vector(63 downto 0)) return decode_input_reg_t is
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variable is_reg : std_ulogic;
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begin
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begin
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is_reg := '0' when insn_ra(insn_in) = "00000" else '1';
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if t = RA or (t = RA_OR_ZERO and insn_ra(insn_in) /= "00000") then
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if t = RA or (t = RA_OR_ZERO and insn_ra(insn_in) /= "00000") then
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--return (is_reg, insn_ra(insn_in), reg_data);
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--return (is_reg, insn_ra(insn_in), reg_data);
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return ('1', insn_ra(insn_in), reg_data);
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return ('1', insn_ra(insn_in), reg_data);
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