Merge pull request #168 from shenki/flash-arty

Scripts to write data to the Arty's SPI flash

openocd/README

@@ -0,0 +1,32 @@
+The Xilinx SPI flashing proxies come from here:
+
+https://github.com/quartiq/bscan_spi_bitstreams/blob/single-tap/bscan_spi_xc7a35t.bit?raw=true
+https://github.com/quartiq/bscan_spi_bitstreams/blob/single-tap/bscan_spi_xc7a100t.bit?raw=true
+
+These are the "old" single tap versions that are supported by the openocd
+release packaged in distros (0.10). If you use the wrong versions you see this:
+
+$ ./openocd/flash-arty microwatt_0.bit
+Open On-Chip Debugger 0.10.0
+Licensed under GNU GPL v2
+For bug reports, read
+	http://openocd.org/doc/doxygen/bugs.html
+none separate
+Info : auto-selecting first available session transport "jtag". To override use 'transport select <transport>'.
+adapter speed: 25000 kHz
+fpga_program
+Info : ftdi: if you experience problems at higher adapter clocks, try the command "ftdi_tdo_sample_edge falling"
+Info : clock speed 25000 kHz
+Info : JTAG tap: xc7.tap tap/device found: 0x0362d093 (mfg: 0x049 (Xilinx), part: 0x362d, ver: 0x0)
+loaded file openocd/bscan_spi_xc7a35t.bit to pld device 0 in 0s 152803us
+Info : JTAG tap: xc7.tap tap/device found: 0x0362d093 (mfg: 0x049 (Xilinx), part: 0x362d, ver: 0x0)
+Error: Unknown flash device (ID 0x00ffffff)
+
+If you find yourself with a later openocd version that contians 867bdb2e9248
+("jtagspi: new protocol that includes transfer length") you should fetch the
+bitstream from the master branch:
+
+https://github.com/quartiq/bscan_spi_bitstreams/blob/master/bscan_spi_xc7a35t.bit?raw=true
+https://github.com/quartiq/bscan_spi_bitstreams/blob/master/bscan_spi_xc7a100t.bit?raw=true
+
+

openocd/flash-arty

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+#!/usr/bin/python3
+
+import argparse
+import os
+import subprocess
+import sys
+
+BASE = os.path.dirname(os.path.abspath(__file__))
+CONFIG = os.path.join(BASE, "xilinx-xc7.cfg")
+
+def flash(config, flash_proxy, address, data, set_qe=False):
+    script = "; ".join([
+        "init",
+        "jtagspi_init 0 {{{}}}".format(flash_proxy),
+        "jtagspi set_qe 0 1" if set_qe else "",
+        "jtagspi_program {{{}}} 0x{:x}".format(data, address),
+        "fpga_program",
+        "exit"
+    ])
+    subprocess.call(["openocd", "-f", config, "-c", script])
+
+parser = argparse.ArgumentParser()
+parser.add_argument("file", help="file to write to flash")
+parser.add_argument("-a", "--address", help="offset in flash", type=int, default=0)
+parser.add_argument("-f", "--fpga", help="a35 or a100", default="a35")
+args = parser.parse_args()
+
+if args.fpga.lower() == "a35":
+        proxy = "bscan_spi_xc7a35t.bit"
+elif args.fpga.lower() == "a100":
+        proxy = "bscan_spi_xc7a100t.bit"
+else:
+    print("error: specify a35 or a100 when flashing")
+    sys.exit()
+
+proxy = os.path.join(BASE, proxy)
+
+flash(CONFIG, proxy, args.address, args.file)

openocd/xilinx-xc7.cfg

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+interface ftdi
+ftdi_vid_pid 0x0403 0x6010
+ftdi_channel 0
+ftdi_layout_init 0x00e8 0x60eb
+reset_config none
+
+source [find cpld/xilinx-xc7.cfg]
+source [find cpld/jtagspi.cfg]
+adapter_khz 25000
+
+proc fpga_program {} {
+    global _CHIPNAME
+    xc7_program $_CHIPNAME.tap
+}