removing vhdl 2008 sequentioal conditional assignment syntax

pull/240/head
Alaa Salman 4 years ago committed by GitHub
parent fcec66acf4
commit 32b0635d71
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@ -425,10 +425,31 @@ begin
-- Next insn adder used in a couple of places
next_nia := std_ulogic_vector(unsigned(e_in.nia) + 4);

--rotator coontrol signals --Syntax edit to remove vhdl 2009 features
if (e_in.insn_type = OP_SHR) then
right_shift <= '1';
else
right_shift <= '0';
end if;
if ((e_in.insn_type = OP_RLC) or (e_in.insn_type = OP_RLCL)) then
rot_clear_left <= '1';
else
rot_clear_left <= '0';
end if;
if ((e_in.insn_type = OP_RLC) or (e_in.insn_type = OP_RLCR)) then
rot_clear_right <= '1';
else
rot_clear_right <= '0';
end if;


-- rotator control signals
right_shift <= '1' when e_in.insn_type = OP_SHR else '0';
rot_clear_left <= '1' when e_in.insn_type = OP_RLC or e_in.insn_type = OP_RLCL else '0';
rot_clear_right <= '1' when e_in.insn_type = OP_RLC or e_in.insn_type = OP_RLCR else '0';
--right_shift <= '1' when e_in.insn_type = OP_SHR else '0';
--rot_clear_left <= '1' when e_in.insn_type = OP_RLC or e_in.insn_type = OP_RLCL else '0';
--rot_clear_right <= '1' when e_in.insn_type = OP_RLC or e_in.insn_type = OP_RLCR else '0';

ctrl_tmp.irq_state <= WRITE_SRR0;
exception := '0';

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