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microwatt/litedram/generated/sim/litedram_core.init

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litedram: Add simulation support This adds a simulated litedram model along with the necessary Makefile gunk to verilate it and wrap it for use by ghdl. The core_dram_tb test bench is a variant of core_tb with LiteDRAM simulated. It's not built by default, an explicit make core_dram_tb is necessary as to not require verilator to be installed for the normal build process (also it's slow'ish). Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
5 years ago
4800002408000048
01006b69a600607d
a602487d05009f42
a64b5a7d14004a39
2402004ca64b7b7d
602100003c200000
spi: Add booting from flash to litedram init It will look for an ELF binary at the flash offset specified for the board (currently 0x300000 on Arty but that could be changed). Note: litedram is regenerated in order to rebuild the init code, which was done using a newer version of litedram from LiteX. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
4 years ago
6421ff00782107c6
litedram: Regenerate This regenerate litedram for all targets (genesys2 is new in this build) using the latest LiteX. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
4 years ago
3d80000060215f00
litedram: Add simulation support This adds a simulated litedram model along with the necessary Makefile gunk to verilate it and wrap it for use by ghdl. The core_dram_tb test bench is a variant of core_tb with LiteDRAM simulated. It's not built by default, an explicit make core_dram_tb is necessary as to not require verilator to be installed for the normal build process (also it's slow'ish). Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
5 years ago
798c07c6618c0000
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
618c10d8658cff00
litedram: Add simulation support This adds a simulated litedram model along with the necessary Makefile gunk to verilate it and wrap it for use by ghdl. The core_dram_tb test bench is a variant of core_tb with LiteDRAM simulated. It's not built by default, an explicit make core_dram_tb is necessary as to not require verilator to be installed for the normal build process (also it's slow'ish). Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
5 years ago
4e8004217d8903a6
spi: Add booting from flash to litedram init It will look for an ELF binary at the flash offset specified for the board (currently 0x300000 on Arty but that could be changed). Note: litedram is regenerated in order to rebuild the init code, which was done using a newer version of litedram from LiteX. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
4 years ago
4e8004207c6903a6
litedram: Add simulation support This adds a simulated litedram model along with the necessary Makefile gunk to verilate it and wrap it for use by ghdl. The core_dram_tb test bench is a variant of core_tb with LiteDRAM simulated. It's not built by default, an explicit make core_dram_tb is necessary as to not require verilator to be installed for the normal build process (also it's slow'ish). Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
5 years ago
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spi: Add booting from flash to litedram init It will look for an ELF binary at the flash offset specified for the board (currently 0x300000 on Arty but that could be changed). Note: litedram is regenerated in order to rebuild the init code, which was done using a newer version of litedram from LiteX. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
4 years ago
392000003d40c000
794a0020614a6004
7d2057aa7c0004ac
6000000060000000
6000000060000000
4e80002060000000
litedram: Add support for booting without BRAM This adds an option to disable the main BRAM and instead copy a payload stashed along with the init code in the secondary BRAM into DRAM and boot from there Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
5 years ago
0000000000000000
litedram: Add simulation support This adds a simulated litedram model along with the necessary Makefile gunk to verilate it and wrap it for use by ghdl. The core_dram_tb test bench is a variant of core_tb with LiteDRAM simulated. It's not built by default, an explicit make core_dram_tb is necessary as to not require verilator to be installed for the normal build process (also it's slow'ish). Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
5 years ago
3c4c000100000000
Regenerate litedram and liteeth Note: There are a few patches to upstream to fix an upstream breakage of litedram standalone generator, and fix some issues with liteeth in the way it's used on Wukong. All these have pending pull requests. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
3 years ago
7c0802a63842a3c4
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
f8010010fbe1fff8
f88100d8f821ff51
spi: Add booting from flash to litedram init It will look for an ELF binary at the flash offset specified for the board (currently 0x300000 on Arty but that could be changed). Note: litedram is regenerated in order to rebuild the init code, which was done using a newer version of litedram from LiteX. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
4 years ago
38800080f8a100e0
litedram: Regenerate from upstream litex Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
3 years ago
f8c100e87c651b78
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
38c100d838610020
litedram: Regenerate from upstream litex Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
3 years ago
f90100f8f8e100f0
spi: Add booting from flash to litedram init It will look for an ELF binary at the flash offset specified for the board (currently 0x300000 on Arty but that could be changed). Note: litedram is regenerated in order to rebuild the init code, which was done using a newer version of litedram from LiteX. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
4 years ago
f9410108f9210100
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
6000000048001781
386100207c7f1b78
6000000048001199
litedram: Regenerate from upstream litex Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
3 years ago
7fe3fb78382100b0
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
0000000048001e88
0000018001000000
spi: Add booting from flash to litedram init It will look for an ELF binary at the flash offset specified for the board (currently 0x300000 on Arty but that could be changed). Note: litedram is regenerated in order to rebuild the init code, which was done using a newer version of litedram from LiteX. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
4 years ago
000000004e800020
0000000000000000
4c00012c7c0007ac
000000004e800020
0000000000000000
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
3842a3283c4c0001
7d6000267c0802a6
9161000848001dc1
48001195f821fed1
litedram: Add simulation support This adds a simulated litedram model along with the necessary Makefile gunk to verilate it and wrap it for use by ghdl. The core_dram_tb test bench is a variant of core_tb with LiteDRAM simulated. It's not built by default, an explicit make core_dram_tb is necessary as to not require verilator to be installed for the normal build process (also it's slow'ish). Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
5 years ago
3c62ffff60000000
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
4bffff4138637b38
litedram: Regenerate from upstream litex Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
3 years ago
788400203c80c000
litedram: Add simulation support This adds a simulated litedram model along with the necessary Makefile gunk to verilate it and wrap it for use by ghdl. The core_dram_tb test bench is a variant of core_tb with LiteDRAM simulated. It's not built by default, an explicit make core_dram_tb is necessary as to not require verilator to be installed for the normal build process (also it's slow'ish). Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
5 years ago
7c8026ea7c0004ac
3fe0c0003c62ffff
litedram: disable block_until_ready, regenerate Recent litedram gets stuck at memtest unless block_until_ready=False. (discussion in https://github.com/enjoy-digital/litedram/pull/292) This change regenerates with latest litedram and litex 62abf9c ("litedram_gen: Add block_until_ready port parameter to control blocking behaviour.") add2746a ("tools/litex_cli: Rename wb to bus.") Signed-off-by: Matt Johnston <matt@codeconstruct.com.au>
3 years ago
63ff000838637b58
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
3c62ffff4bffff1d
litedram: disable block_until_ready, regenerate Recent litedram gets stuck at memtest unless block_until_ready=False. (discussion in https://github.com/enjoy-digital/litedram/pull/292) This change regenerates with latest litedram and litex 62abf9c ("litedram_gen: Add block_until_ready port parameter to control blocking behaviour.") add2746a ("tools/litex_cli: Rename wb to bus.") Signed-off-by: Matt Johnston <matt@codeconstruct.com.au>
3 years ago
38637b787bff0020
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
7c0004ac4bffff0d
litedram: Add simulation support This adds a simulated litedram model along with the necessary Makefile gunk to verilate it and wrap it for use by ghdl. The core_dram_tb test bench is a variant of core_tb with LiteDRAM simulated. It's not built by default, an explicit make core_dram_tb is necessary as to not require verilator to be installed for the normal build process (also it's slow'ish). Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
5 years ago
73e900017fe0feea
3c62ffff41820010
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
4bfffef138637b90
4d80000073e90002
litedram: Add simulation support This adds a simulated litedram model along with the necessary Makefile gunk to verilate it and wrap it for use by ghdl. The core_dram_tb test bench is a variant of core_tb with LiteDRAM simulated. It's not built by default, an explicit make core_dram_tb is necessary as to not require verilator to be installed for the normal build process (also it's slow'ish). Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
5 years ago
3c62ffff41820010
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
4bfffed938637b98
4e00000073e90004
litedram: Add support for booting without BRAM This adds an option to disable the main BRAM and instead copy a payload stashed along with the init code in the secondary BRAM into DRAM and boot from there Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
5 years ago
3c62ffff41820010
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
4bfffec138637ba0
spi: Add booting from flash to litedram init It will look for an ELF binary at the flash offset specified for the board (currently 0x300000 on Arty but that could be changed). Note: litedram is regenerated in order to rebuild the init code, which was done using a newer version of litedram from LiteX. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
4 years ago
4d00000073e90008
3c62ffff41820010
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
4bfffea938637ba8
liteeth: Hook up LiteX LiteEth ethernet controller Currently only generated for Arty. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
4 years ago
4182001073e90010
litedram: disable block_until_ready, regenerate Recent litedram gets stuck at memtest unless block_until_ready=False. (discussion in https://github.com/enjoy-digital/litedram/pull/292) This change regenerates with latest litedram and litex 62abf9c ("litedram_gen: Add block_until_ready port parameter to control blocking behaviour.") add2746a ("tools/litex_cli: Rename wb to bus.") Signed-off-by: Matt Johnston <matt@codeconstruct.com.au>
3 years ago
38637bb83c62ffff
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
73ff01004bfffe95
litedram: Regenerate from upstream litex This adds Joel's sdcard feature reporting to the firmware. Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
3 years ago
3c62ffff41820010
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
4bfffe8138637bc8
litedram: disable block_until_ready, regenerate Recent litedram gets stuck at memtest unless block_until_ready=False. (discussion in https://github.com/enjoy-digital/litedram/pull/292) This change regenerates with latest litedram and litex 62abf9c ("litedram_gen: Add block_until_ready port parameter to control blocking behaviour.") add2746a ("tools/litex_cli: Rename wb to bus.") Signed-off-by: Matt Johnston <matt@codeconstruct.com.au>
3 years ago
3b7b7bd03f62ffff
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
4bfffe717f63db78
3c80c00041920028
litedram: Regenerate from upstream litex This adds Joel's sdcard feature reporting to the firmware. Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
3 years ago
7884002060840010
7c8026ea7c0004ac
7884b5823c62ffff
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
4bfffe4938637bd8
3c80c000418e004c
litedram: Regenerate from upstream litex This adds Joel's sdcard feature reporting to the firmware. Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
3 years ago
7884002060840018
7c8026ea7c0004ac
788460223c62ffff
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
4bfffe2138637bf0
litedram: Regenerate from upstream litex This adds Joel's sdcard feature reporting to the firmware. Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
3 years ago
608400303c80c000
liteeth: Hook up LiteX LiteEth ethernet controller Currently only generated for Arty. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
4 years ago
7c0004ac78840020
3c62ffff7c8026ea
litedram: disable block_until_ready, regenerate Recent litedram gets stuck at memtest unless block_until_ready=False. (discussion in https://github.com/enjoy-digital/litedram/pull/292) This change regenerates with latest litedram and litex 62abf9c ("litedram_gen: Add block_until_ready port parameter to control blocking behaviour.") add2746a ("tools/litex_cli: Rename wb to bus.") Signed-off-by: Matt Johnston <matt@codeconstruct.com.au>
3 years ago
38637c087884b282
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
3d20c0004bfffdfd
litedram: Regenerate from upstream litex This adds Joel's sdcard feature reporting to the firmware. Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
3 years ago
7929002061290020
7d204eea7c0004ac
792906003c80000f
3c62ffff60844240
litedram: disable block_until_ready, regenerate Recent litedram gets stuck at memtest unless block_until_ready=False. (discussion in https://github.com/enjoy-digital/litedram/pull/292) This change regenerates with latest litedram and litex 62abf9c ("litedram_gen: Add block_until_ready port parameter to control blocking behaviour.") add2746a ("tools/litex_cli: Rename wb to bus.") Signed-off-by: Matt Johnston <matt@codeconstruct.com.au>
3 years ago
38637c207c892392
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
418a02604bfffdcd
63de00383fc0c000
7c0004ac7bde0020
3d40c0007fc0f6ea
litedram: Regenerate from upstream litex This adds Joel's sdcard feature reporting to the firmware. Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
3 years ago
614a600439200002
7c0004ac794a0020
3fe0c0007d2057aa
63ff60003920ff9f
7c0004ac7bff0020
7c0004ac7d20ffaa
litedram: disable block_until_ready, regenerate Recent litedram gets stuck at memtest unless block_until_ready=False. (discussion in https://github.com/enjoy-digital/litedram/pull/292) This change regenerates with latest litedram and litex 62abf9c ("litedram_gen: Add block_until_ready port parameter to control blocking behaviour.") add2746a ("tools/litex_cli: Rename wb to bus.") Signed-off-by: Matt Johnston <matt@codeconstruct.com.au>
3 years ago
7c0004ac7fa0feaa
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
7c0004ac7f80feaa
4bfffd257fe0feaa
litedram: disable block_until_ready, regenerate Recent litedram gets stuck at memtest unless block_until_ready=False. (discussion in https://github.com/enjoy-digital/litedram/pull/292) This change regenerates with latest litedram and litex 62abf9c ("litedram_gen: Add block_until_ready port parameter to control blocking behaviour.") add2746a ("tools/litex_cli: Rename wb to bus.") Signed-off-by: Matt Johnston <matt@codeconstruct.com.au>
3 years ago
57e6063e3c62ffff
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
57a4063e5785063e
litedram: disable block_until_ready, regenerate Recent litedram gets stuck at memtest unless block_until_ready=False. (discussion in https://github.com/enjoy-digital/litedram/pull/292) This change regenerates with latest litedram and litex 62abf9c ("litedram_gen: Add block_until_ready port parameter to control blocking behaviour.") add2746a ("tools/litex_cli: Rename wb to bus.") Signed-off-by: Matt Johnston <matt@codeconstruct.com.au>
3 years ago
57f8063e38637c40
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
7fa9e3784bfffd4d
7d29fb78579a063e
5529063e57b9063e
litedram: disable block_until_ready, regenerate Recent litedram gets stuck at memtest unless block_until_ready=False. (discussion in https://github.com/enjoy-digital/litedram/pull/292) This change regenerates with latest litedram and litex 62abf9c ("litedram_gen: Add block_until_ready port parameter to control blocking behaviour.") add2746a ("tools/litex_cli: Rename wb to bus.") Signed-off-by: Matt Johnston <matt@codeconstruct.com.au>
3 years ago
418201682c090000
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
7fbdf8387fbde038
2c1d00ff57bd063e
2c19000141820154
2c1a000240820184
739c00bf41820010
408201302c1c0020
Regenerate litedram and liteeth Note: There are a few patches to upstream to fix an upstream breakage of litedram standalone generator, and fix some issues with liteeth in the way it's used on Wukong. All these have pending pull requests. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
3 years ago
57ff063e3bffffe8
litedram: disable block_until_ready, regenerate Recent litedram gets stuck at memtest unless block_until_ready=False. (discussion in https://github.com/enjoy-digital/litedram/pull/292) This change regenerates with latest litedram and litex 62abf9c ("litedram_gen: Add block_until_ready port parameter to control blocking behaviour.") add2746a ("tools/litex_cli: Rename wb to bus.") Signed-off-by: Matt Johnston <matt@codeconstruct.com.au>
3 years ago
41810120281f0001
Regenerate litedram and liteeth Note: There are a few patches to upstream to fix an upstream breakage of litedram standalone generator, and fix some issues with liteeth in the way it's used on Wukong. All these have pending pull requests. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
3 years ago
392000353fe0c000
7bff002063ff6000
spi: Add booting from flash to litedram init It will look for an ELF binary at the flash offset specified for the board (currently 0x300000 on Arty but that could be changed). Note: litedram is regenerated in order to rebuild the init code, which was done using a newer version of litedram from LiteX. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
4 years ago
7d20ffaa7c0004ac
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
3b4000023fa0c000
7bbd002063bd6004
7f40efaa7c0004ac
Regenerate litedram and liteeth Note: There are a few patches to upstream to fix an upstream breakage of litedram standalone generator, and fix some issues with liteeth in the way it's used on Wukong. All these have pending pull requests. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
3 years ago
7d20ffaa7c0004ac
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
7f80feaa7c0004ac
3c62ffff4bfffc69
38637c605784063e
738900024bfffc9d
litedram: disable block_until_ready, regenerate Recent litedram gets stuck at memtest unless block_until_ready=False. (discussion in https://github.com/enjoy-digital/litedram/pull/292) This change regenerates with latest litedram and litex 62abf9c ("litedram_gen: Add block_until_ready port parameter to control blocking behaviour.") add2746a ("tools/litex_cli: Rename wb to bus.") Signed-off-by: Matt Johnston <matt@codeconstruct.com.au>
3 years ago
3c62ffff40820090
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
4bfffc8938637c80
7f40efaa7c0004ac
litedram: disable block_until_ready, regenerate Recent litedram gets stuck at memtest unless block_until_ready=False. (discussion in https://github.com/enjoy-digital/litedram/pull/292) This change regenerates with latest litedram and litex 62abf9c ("litedram_gen: Add block_until_ready port parameter to control blocking behaviour.") add2746a ("tools/litex_cli: Rename wb to bus.") Signed-off-by: Matt Johnston <matt@codeconstruct.com.au>
3 years ago
7c0004ac39200006
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
4bfffc2d7d20ffaa
7f40efaa7c0004ac
litedram: disable block_until_ready, regenerate Recent litedram gets stuck at memtest unless block_until_ready=False. (discussion in https://github.com/enjoy-digital/litedram/pull/292) This change regenerates with latest litedram and litex 62abf9c ("litedram_gen: Add block_until_ready port parameter to control blocking behaviour.") add2746a ("tools/litex_cli: Rename wb to bus.") Signed-off-by: Matt Johnston <matt@codeconstruct.com.au>
3 years ago
7c0004ac39200001
392000007d20ffaa
Regenerate litedram and liteeth Note: There are a few patches to upstream to fix an upstream breakage of litedram standalone generator, and fix some issues with liteeth in the way it's used on Wukong. All these have pending pull requests. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
3 years ago
7d20ffaa7c0004ac
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
7c0004ac639c0002
7c0004ac7f80ffaa
4bfffbf57d20efaa
litedram: disable block_until_ready, regenerate Recent litedram gets stuck at memtest unless block_until_ready=False. (discussion in https://github.com/enjoy-digital/litedram/pull/292) This change regenerates with latest litedram and litex 62abf9c ("litedram_gen: Add block_until_ready port parameter to control blocking behaviour.") add2746a ("tools/litex_cli: Rename wb to bus.") Signed-off-by: Matt Johnston <matt@codeconstruct.com.au>
3 years ago
3b4000053b000002
7c0004ac7ff9fb78
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
7c0004ac7f00efaa
litedram: disable block_until_ready, regenerate Recent litedram gets stuck at memtest unless block_until_ready=False. (discussion in https://github.com/enjoy-digital/litedram/pull/292) This change regenerates with latest litedram and litex 62abf9c ("litedram_gen: Add block_until_ready port parameter to control blocking behaviour.") add2746a ("tools/litex_cli: Rename wb to bus.") Signed-off-by: Matt Johnston <matt@codeconstruct.com.au>
3 years ago
7c0004ac7f40cfaa
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
4bfffbcd7f80feaa
4082ffe0739c0001
litedram: disable block_until_ready, regenerate Recent litedram gets stuck at memtest unless block_until_ready=False. (discussion in https://github.com/enjoy-digital/litedram/pull/292) This change regenerates with latest litedram and litex 62abf9c ("litedram_gen: Add block_until_ready port parameter to control blocking behaviour.") add2746a ("tools/litex_cli: Rename wb to bus.") Signed-off-by: Matt Johnston <matt@codeconstruct.com.au>
3 years ago
38637c983c62ffff
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
3d40c0004bfffbfd
litedram: disable block_until_ready, regenerate Recent litedram gets stuck at memtest unless block_until_ready=False. (discussion in https://github.com/enjoy-digital/litedram/pull/292) This change regenerates with latest litedram and litex 62abf9c ("litedram_gen: Add block_until_ready port parameter to control blocking behaviour.") add2746a ("tools/litex_cli: Rename wb to bus.") Signed-off-by: Matt Johnston <matt@codeconstruct.com.au>
3 years ago
794a0020614a6008
7d20562a7c0004ac
652920005529021e
7c0004ac61291f6b
7f63db787d20572a
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
3c62ffff4bfffbcd
38637ca87bc40020
4bfffbb97fdaf378
4bfffbb17f63db78
419200d0408e0094
38637cc83c62ffff
386000004bfffb9d
2c190020480001a0
2c1a00ba4082ffbc
2c1800184082ffb4
3c62ffff4082ffac
4bfffb7138637c90
7f63db784bffff68
408e00684bfffb65
3c62ffff4092ffb8
4bfffb5138637dd8
38a000003c80ff00
60a5a00060846000
3c60400078840020
6000000048000eb1
38637df83c62ffff
4bfffb9d4bfffb25
3c82ffff4bffff84
38847ce03c62ffff
4bfffb0938637cf0
60000000480002e5
3c82ffff4bffff54
38847ce03c62ffff
4bfffae938637cf0
60000000480002c5
3c62ffff4bffff80
4bfffad138637d10
38a000403c9ef000
Regenerate litedram and liteeth Note: There are a few patches to upstream to fix an upstream breakage of litedram standalone generator, and fix some issues with liteeth in the way it's used on Wukong. All these have pending pull requests. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
3 years ago
3861007078840020
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
6000000048000e39
Regenerate litedram and liteeth Note: There are a few patches to upstream to fix an upstream breakage of litedram standalone generator, and fix some issues with liteeth in the way it's used on Wukong. All these have pending pull requests. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
3 years ago
3d400002e9210070
614a464c3c62ffff
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
794a83e438637d28
Regenerate litedram and liteeth Note: There are a few patches to upstream to fix an upstream breakage of litedram standalone generator, and fix some issues with liteeth in the way it's used on Wukong. All these have pending pull requests. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
3 years ago
614a457f79290600
408200247c295000
2c09000189210075
a121008240820010
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
418200442c090015
38637d483c62ffff
892100774bfffa6d
Regenerate litedram and liteeth Note: There are a few patches to upstream to fix an upstream breakage of litedram standalone generator, and fix some issues with liteeth in the way it's used on Wukong. All these have pending pull requests. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
3 years ago
8901007489410076
3c62ffff88e10073
88a1007188c10072
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
38637da888810070
Regenerate litedram and liteeth Note: There are a few patches to upstream to fix an upstream breakage of litedram standalone generator, and fix some issues with liteeth in the way it's used on Wukong. All these have pending pull requests. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
3 years ago
89210075f9210060
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
4bfffee04bfffa3d
3f22ffffe9210090
3b397d603ba00000
a12100a87fde4a14
litedram: disable block_until_ready, regenerate Recent litedram gets stuck at memtest unless block_until_ready=False. (discussion in https://github.com/enjoy-digital/litedram/pull/292) This change regenerates with latest litedram and litex 62abf9c ("litedram_gen: Add block_until_ready port parameter to control blocking behaviour.") add2746a ("tools/litex_cli: Rename wb to bus.") Signed-off-by: Matt Johnston <matt@codeconstruct.com.au>
3 years ago
418000347c1d4840
3c62ffff80810088
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
4bfffa0938637d88
e86100884bfffa81
4182fea02c23ffff
8161000838210130
4800189c7d638120
38a000383c9ef000
386100b078840020
6000000048000d51
litedram: disable block_until_ready, regenerate Recent litedram gets stuck at memtest unless block_until_ready=False. (discussion in https://github.com/enjoy-digital/litedram/pull/292) This change regenerates with latest litedram and litex 62abf9c ("litedram_gen: Add block_until_ready port parameter to control blocking behaviour.") add2746a ("tools/litex_cli: Rename wb to bus.") Signed-off-by: Matt Johnston <matt@codeconstruct.com.au>
3 years ago
2c090001812100b0
eb6100d040820048
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
ebe100b8eb8100c0
7f23cb787ba40020
litedram: disable block_until_ready, regenerate Recent litedram gets stuck at memtest unless block_until_ready=False. (discussion in https://github.com/enjoy-digital/litedram/pull/292) This change regenerates with latest litedram and litex 62abf9c ("litedram_gen: Add block_until_ready port parameter to control blocking behaviour.") add2746a ("tools/litex_cli: Rename wb to bus.") Signed-off-by: Matt Johnston <matt@codeconstruct.com.au>
3 years ago
7b6500207f86e378
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
4bfff9a13ffff000
7b6500207c9fd214
litedram: disable block_until_ready, regenerate Recent litedram gets stuck at memtest unless block_until_ready=False. (discussion in https://github.com/enjoy-digital/litedram/pull/292) This change regenerates with latest litedram and litex 62abf9c ("litedram_gen: Add block_until_ready port parameter to control blocking behaviour.") add2746a ("tools/litex_cli: Rename wb to bus.") Signed-off-by: Matt Johnston <matt@codeconstruct.com.au>
3 years ago
7f83e37878840020
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
6000000048000d09
7fde4a14a12100a6
litedram: disable block_until_ready, regenerate Recent litedram gets stuck at memtest unless block_until_ready=False. (discussion in https://github.com/enjoy-digital/litedram/pull/292) This change regenerates with latest litedram and litex 62abf9c ("litedram_gen: Add block_until_ready port parameter to control blocking behaviour.") add2746a ("tools/litex_cli: Rename wb to bus.") Signed-off-by: Matt Johnston <matt@codeconstruct.com.au>
3 years ago
4bffff583bbd0001
0300000000000000
3d20c80000000880
7929002061290804
liteeth: Hook up LiteX LiteEth ethernet controller Currently only generated for Arty. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
4 years ago
7c604f2a7c0004ac
litedram: Regenerate from upstream litex This adds Joel's sdcard feature reporting to the firmware. Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
3 years ago
392000013d40c800
litedram: disable block_until_ready, regenerate Recent litedram gets stuck at memtest unless block_until_ready=False. (discussion in https://github.com/enjoy-digital/litedram/pull/292) This change regenerates with latest litedram and litex 62abf9c ("litedram_gen: Add block_until_ready port parameter to control blocking behaviour.") add2746a ("tools/litex_cli: Rename wb to bus.") Signed-off-by: Matt Johnston <matt@codeconstruct.com.au>
3 years ago
794a0020614a0808
litedram: Regenerate from upstream litex This adds Joel's sdcard feature reporting to the firmware. Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
3 years ago
7d20572a7c0004ac
liteeth: Hook up LiteX LiteEth ethernet controller Currently only generated for Arty. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
4 years ago
000000004e800020
0000000000000000
litedram: Regenerate from upstream litex This adds Joel's sdcard feature reporting to the firmware. Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
3 years ago
786900202c030000
4080000839290001
2c29000139200001
4d8200203929ffff
4bfffff060000000
litedram: Regenerate from upstream litex Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
3 years ago
0000000000000000
litedram: Regenerate from upstream litex This adds Joel's sdcard feature reporting to the firmware. Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
3 years ago
3c4c000100000000
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
3d20c80038429cb4
litedram: disable block_until_ready, regenerate Recent litedram gets stuck at memtest unless block_until_ready=False. (discussion in https://github.com/enjoy-digital/litedram/pull/292) This change regenerates with latest litedram and litex 62abf9c ("litedram_gen: Add block_until_ready port parameter to control blocking behaviour.") add2746a ("tools/litex_cli: Rename wb to bus.") Signed-off-by: Matt Johnston <matt@codeconstruct.com.au>
3 years ago
7929002061290800
7d404e2a7c0004ac
4d820020280a000e
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
3940000e7c0802a6
f821ffa1f8010010
litedram: disable block_until_ready, regenerate Recent litedram gets stuck at memtest unless block_until_ready=False. (discussion in https://github.com/enjoy-digital/litedram/pull/292) This change regenerates with latest litedram and litex 62abf9c ("litedram_gen: Add block_until_ready port parameter to control blocking behaviour.") add2746a ("tools/litex_cli: Rename wb to bus.") Signed-off-by: Matt Johnston <matt@codeconstruct.com.au>
3 years ago
7d404f2a7c0004ac
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
38637e103c62ffff
600000004bfff8b5
Regenerate litedram and liteeth Note: There are a few patches to upstream to fix an upstream breakage of litedram standalone generator, and fix some issues with liteeth in the way it's used on Wukong. All these have pending pull requests. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
3 years ago
e801001038210060
4e8000207c0803a6
0100000000000000
3c4c000100000080
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
3d20c80038429c4c
litedram: disable block_until_ready, regenerate Recent litedram gets stuck at memtest unless block_until_ready=False. (discussion in https://github.com/enjoy-digital/litedram/pull/292) This change regenerates with latest litedram and litex 62abf9c ("litedram_gen: Add block_until_ready port parameter to control blocking behaviour.") add2746a ("tools/litex_cli: Rename wb to bus.") Signed-off-by: Matt Johnston <matt@codeconstruct.com.au>
3 years ago
7929002061290800
7d404e2a7c0004ac
4d820020280a0001
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
394000017c0802a6
f821ffa1f8010010
litedram: disable block_until_ready, regenerate Recent litedram gets stuck at memtest unless block_until_ready=False. (discussion in https://github.com/enjoy-digital/litedram/pull/292) This change regenerates with latest litedram and litex 62abf9c ("litedram_gen: Add block_until_ready port parameter to control blocking behaviour.") add2746a ("tools/litex_cli: Rename wb to bus.") Signed-off-by: Matt Johnston <matt@codeconstruct.com.au>
3 years ago
7d404f2a7c0004ac
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
38637e383c62ffff
600000004bfff84d
litedram: Regenerate from upstream litex This adds Joel's sdcard feature reporting to the firmware. Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
3 years ago
e801001038210060
4e8000207c0803a6
0100000000000000
3c4c000100000080
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
7c0802a638429be4
3c8040003c62ffff
4800167d38637e60
3f60c800f821ff71
7b7b00203be00000
600000004bfff7fd
litedram: disable block_until_ready, regenerate Recent litedram gets stuck at memtest unless block_until_ready=False. (discussion in https://github.com/enjoy-digital/litedram/pull/292) This change regenerates with latest litedram and litex 62abf9c ("litedram_gen: Add block_until_ready port parameter to control blocking behaviour.") add2746a ("tools/litex_cli: Rename wb to bus.") Signed-off-by: Matt Johnston <matt@codeconstruct.com.au>
3 years ago
7c0004ac4bffff05
3f40c8007fe0df2a
7b5a0020635a0004
7fe0d72a7c0004ac
63bd080c3fa0c800
litedram: Regenerate from upstream litex This adds Joel's sdcard feature reporting to the firmware. Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
3 years ago
7c0004ac7bbd0020
litedram: disable block_until_ready, regenerate Recent litedram gets stuck at memtest unless block_until_ready=False. (discussion in https://github.com/enjoy-digital/litedram/pull/292) This change regenerates with latest litedram and litex 62abf9c ("litedram_gen: Add block_until_ready port parameter to control blocking behaviour.") add2746a ("tools/litex_cli: Rename wb to bus.") Signed-off-by: Matt Johnston <matt@codeconstruct.com.au>
3 years ago
3fc0c8007fe0ef2a
7bde002063de0810
7fe0f72a7c0004ac
3920000c3f80c800
7b9c0020639c0800
7d20e72a7c0004ac
6063c35038600000
7c0004ac4bfffe61
7c0004ac7fe0ef2a
3920000e7fe0f72a
7d20e72a7c0004ac
4bfffe3d38602710
7c0004ac39200200
392000027d20ef2a
7d20f72a7c0004ac
4bfffde13860000f
7fe0ef2a7c0004ac
litedram: Regenerate from upstream litex This adds Joel's sdcard feature reporting to the firmware. Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
3 years ago
7c0004ac39200003
litedram: disable block_until_ready, regenerate Recent litedram gets stuck at memtest unless block_until_ready=False. (discussion in https://github.com/enjoy-digital/litedram/pull/292) This change regenerates with latest litedram and litex 62abf9c ("litedram_gen: Add block_until_ready port parameter to control blocking behaviour.") add2746a ("tools/litex_cli: Rename wb to bus.") Signed-off-by: Matt Johnston <matt@codeconstruct.com.au>
3 years ago
3860000f7d20f72a
392000064bfffdc5
7d20ef2a7c0004ac
7c0004ac3b800001
3860000f7f80f72a
392009204bfffda5
7d20ef2a7c0004ac
7fe0f72a7c0004ac
4bfffd893860000f
4bfffdbd386000c8
7c0004ac39200400
7c0004ac7d20ef2a
386000037fe0f72a
386000c84bfffd65
4bfffe394bfffd99
3c60400038800400
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
60000000480006e9
litedram: disable block_until_ready, regenerate Recent litedram gets stuck at memtest unless block_until_ready=False. (discussion in https://github.com/enjoy-digital/litedram/pull/292) This change regenerates with latest litedram and litex 62abf9c ("litedram_gen: Add block_until_ready port parameter to control blocking behaviour.") add2746a ("tools/litex_cli: Rename wb to bus.") Signed-off-by: Matt Johnston <matt@codeconstruct.com.au>
3 years ago
408200242c030000
7c0004ac7c691b78
7c0004ac7f80d72a
382100907f80df2a
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
480015447d2307b4
litedram: disable block_until_ready, regenerate Recent litedram gets stuck at memtest unless block_until_ready=False. (discussion in https://github.com/enjoy-digital/litedram/pull/292) This change regenerates with latest litedram and litex 62abf9c ("litedram_gen: Add block_until_ready port parameter to control blocking behaviour.") add2746a ("tools/litex_cli: Rename wb to bus.") Signed-off-by: Matt Johnston <matt@codeconstruct.com.au>
3 years ago
38a0000038c00000
3c60400038800400
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
6000000048000471
litedram: disable block_until_ready, regenerate Recent litedram gets stuck at memtest unless block_until_ready=False. (discussion in https://github.com/enjoy-digital/litedram/pull/292) This change regenerates with latest litedram and litex 62abf9c ("litedram_gen: Add block_until_ready port parameter to control blocking behaviour.") add2746a ("tools/litex_cli: Rename wb to bus.") Signed-off-by: Matt Johnston <matt@codeconstruct.com.au>
3 years ago
7f80df2a7c0004ac
4bffffd039200001
0100000000000000
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
3c4c000100000680
7c0802a638429a0c
f8010010282303ff
41810028f821ffa1
3c62ffff7c641b78
4bfff62938637e80
3821006060000000
7c0803a6e8010010
3d2000104e800020
408000287c234840
39200066786505a0
7864b2827ca54b92
38637e883c62ffff
600000004bfff5ed
3d2040004bffffc4
7c23484078646502
7863b28240800024
7d29185078895564
3c62ffff38a00066
38637e987ca92b92
786317824bffffc8
7865556439200066
7c641b787ca52050
7ca54b923c62ffff
4bffffa438637ea8
0100000000000000
3c4c000100000080
7c0802a63842993c
7cc42a14fbe1fff8
7c8523787cbf2b78
3c62ffff7c641b78
38637eb878c60020
f821ff91f8010010
600000004bfff54d
4bfffef97fe3fb78
38637ec83c62ffff
600000004bfff535
4800140c38210070
0100000000000000
2c24000000000180
litedram: disable block_until_ready, regenerate Recent litedram gets stuck at memtest unless block_until_ready=False. (discussion in https://github.com/enjoy-digital/litedram/pull/292) This change regenerates with latest litedram and litex 62abf9c ("litedram_gen: Add block_until_ready port parameter to control blocking behaviour.") add2746a ("tools/litex_cli: Rename wb to bus.") Signed-off-by: Matt Johnston <matt@codeconstruct.com.au>
3 years ago
7869f84241820024
7c6300d0786307e0
5463028054630794
786300207c634a78
386300014e800020
000000004bfffff4
0000000000000000
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
384298983c4c0001
788407647c0802a6
7c691b783d40aaaa
48001335614aaaaa
litedram: disable block_until_ready, regenerate Recent litedram gets stuck at memtest unless block_until_ready=False. (discussion in https://github.com/enjoy-digital/litedram/pull/292) This change regenerates with latest litedram and litex 62abf9c ("litedram_gen: Add block_until_ready port parameter to control blocking behaviour.") add2746a ("tools/litex_cli: Rename wb to bus.") Signed-off-by: Matt Johnston <matt@codeconstruct.com.au>
3 years ago
7884f0827f832214
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
39040001f821ffc1
7d0903a67c7f1b78
420000807c7d1b78
600000004bfff509
litedram: disable block_until_ready, regenerate Recent litedram gets stuck at memtest unless block_until_ready=False. (discussion in https://github.com/enjoy-digital/litedram/pull/292) This change regenerates with latest litedram and litex 62abf9c ("litedram_gen: Add block_until_ready port parameter to control blocking behaviour.") add2746a ("tools/litex_cli: Rename wb to bus.") Signed-off-by: Matt Johnston <matt@codeconstruct.com.au>
3 years ago
3d00aaaa7d3fe050
7feafb787929f082
3bc0000039290001
6108aaaa7d2903a6
7d3fe05042000060
7929f0823d005555
392900017feafb78
7d2903a661085555
7fffe05042000058
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
600000004bfff4b9
litedram: disable block_until_ready, regenerate Recent litedram gets stuck at memtest unless block_until_ready=False. (discussion in https://github.com/enjoy-digital/litedram/pull/292) This change regenerates with latest litedram and litex 62abf9c ("litedram_gen: Add block_until_ready port parameter to control blocking behaviour.") add2746a ("tools/litex_cli: Rename wb to bus.") Signed-off-by: Matt Johnston <matt@codeconstruct.com.au>
3 years ago
3d2055557bfff082
61295555395f0001
420000407d4903a6
7fc307b438210040
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
91490000480012e8
litedram: disable block_until_ready, regenerate Recent litedram gets stuck at memtest unless block_until_ready=False. (discussion in https://github.com/enjoy-digital/litedram/pull/292) This change regenerates with latest litedram and litex 62abf9c ("litedram_gen: Add block_until_ready port parameter to control blocking behaviour.") add2746a ("tools/litex_cli: Rename wb to bus.") Signed-off-by: Matt Johnston <matt@codeconstruct.com.au>
3 years ago
4bffff7839290004
7c094000812a0000
3bde000141820008
4bffff8c394a0004
394a0004910a0000
815d00004bffffa0
418200087c0a4800
3bbd00043bde0001
000000004bffffac
Regenerate litedram and liteeth Note: There are a few patches to upstream to fix an upstream breakage of litedram standalone generator, and fix some issues with liteeth in the way it's used on Wukong. All these have pending pull requests. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
3 years ago
0000048001000000
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
384297883c4c0001
7c0802a67d600026
2e26000091610008
f821ff414800120d
litedram: disable block_until_ready, regenerate Recent litedram gets stuck at memtest unless block_until_ready=False. (discussion in https://github.com/enjoy-digital/litedram/pull/292) This change regenerates with latest litedram and litex 62abf9c ("litedram_gen: Add block_until_ready port parameter to control blocking behaviour.") add2746a ("tools/litex_cli: Rename wb to bus.") Signed-off-by: Matt Johnston <matt@codeconstruct.com.au>
3 years ago
7cba2b787c7f1b78
789cf0827cde3378
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
81260004419200c0
litedram: disable block_until_ready, regenerate Recent litedram gets stuck at memtest unless block_until_ready=False. (discussion in https://github.com/enjoy-digital/litedram/pull/292) This change regenerates with latest litedram and litex 62abf9c ("litedram_gen: Add block_until_ready port parameter to control blocking behaviour.") add2746a ("tools/litex_cli: Rename wb to bus.") Signed-off-by: Matt Johnston <matt@codeconstruct.com.au>
3 years ago
2c09000082e60000
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
3f02ffff40820044
litedram: disable block_until_ready, regenerate Recent litedram gets stuck at memtest unless block_until_ready=False. (discussion in https://github.com/enjoy-digital/litedram/pull/292) This change regenerates with latest litedram and litex 62abf9c ("litedram_gen: Add block_until_ready port parameter to control blocking behaviour.") add2746a ("tools/litex_cli: Rename wb to bus.") Signed-off-by: Matt Johnston <matt@codeconstruct.com.au>
3 years ago
3b6000013ba00000
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
3b187ed07bf90020
4082009c7c3ce840
7b8510283c62ffff
7be4002038637ed0
3c62ffff4bfffde5
4bfff35138637bd0
4bfff3b560000000
2d97000060000000
3ba000007ffbfb78
3b2000003ac00001
7c3de0407bf50020
408200847fb8eb78
418200282c170000
litedram: disable block_until_ready, regenerate Recent litedram gets stuck at memtest unless block_until_ready=False. (discussion in https://github.com/enjoy-digital/litedram/pull/292) This change regenerates with latest litedram and litex 62abf9c ("litedram_gen: Add block_until_ready port parameter to control blocking behaviour.") add2746a ("tools/litex_cli: Rename wb to bus.") Signed-off-by: Matt Johnston <matt@codeconstruct.com.au>
3 years ago
7b0510283c62ffff
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
7be4002038637ee0
3c62ffff4bfffd8d
4bfff2f938637bd0
382100c060000000
816100087f2307b4
480011887d618120
4bffff503ae00001
7f44d3787b630020
7ba917644bfffdb5
73a97fff7c7f492e
408200147c7b1b78
7f24cb787ba51028
4bfffd317f03c378
4bffff2c3bbd0001
7ac300207f44d378
809b00004bfffd7d
7c761b787c651b78
4182003c7c032040
419200343b390001
2c2c0000e99e0008
7d8903a641820028
78840020e8de0010
7b630020f8410018
e84100184e800421
4082ff582c030000
4082001c73187fff
3c62ffff418e0018
7ea4ab787ba51028
4bfffcb138637ee0
3b7b00043bbd0001
000000004bfffef4
00000b8003000000
384295c83c4c0001
7c0802a67d708026
4800106591610008
7cdb3378f821ff71
2e3b00003ba4ffe0
7c9e23787c7f1b78
7c641b787fa3ea14
38637ef03c62ffff
4bfff1c97cbc2b78
3c62ffff60000000
4092000c38637f08
litedram: disable block_until_ready, regenerate Recent litedram gets stuck at memtest unless block_until_ready=False. (discussion in https://github.com/enjoy-digital/litedram/pull/292) This change regenerates with latest litedram and litex 62abf9c ("litedram_gen: Add block_until_ready port parameter to control blocking behaviour.") add2746a ("tools/litex_cli: Rename wb to bus.") Signed-off-by: Matt Johnston <matt@codeconstruct.com.au>
3 years ago
38637f183c62ffff
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
600000004bfff1ad
4bfffb597fc3f378
38637f283c62ffff
600000004bfff195
408200a82c3c0000
38df00207cf602a6
7c26284038bd0020
7929d9427d3fe850
3900ffff7feafb78
4081000839290001
2c29000139200001
3929fffff90a0000
f90a0010f90a0008
394a0020f90a0018
7d3602a64082ffe4
78ea00203f8005f5
79290020639ce100
7d2950507f9ee1d2
38637f303c62ffff
4bfff1117f9c4b92
7f83e37860000000
3c62ffff4bfffabd
4bfff0f938637f40
3c62ffff60000000
4bfff0e938637bd0
4bfff14d60000000
7f9602a660000000
7d3fe85040920048
3bbd0020395f0020
7c2ae8407929d942
4081000839290001
2c29000139200001
3929ffffe95f0000
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3bff0020e95f0018
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394000007bdbe8c2
3ba000007f7adb78
4082006c7c1dd000
litedram: disable block_until_ready, regenerate Recent litedram gets stuck at memtest unless block_until_ready=False. (discussion in https://github.com/enjoy-digital/litedram/pull/292) This change regenerates with latest litedram and litex 62abf9c ("litedram_gen: Add block_until_ready port parameter to control blocking behaviour.") add2746a ("tools/litex_cli: Rename wb to bus.") Signed-off-by: Matt Johnston <matt@codeconstruct.com.au>
3 years ago
3d4005f57d3602a6
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
614ae1007b9c0020
7fde51d279290020
3c62ffff7d29e050
7fde4b9238637f48
600000004bfff04d
4bfff9f97fc3f378
38637f403c62ffff
600000004bfff035
litedram: disable block_until_ready, regenerate Recent litedram gets stuck at memtest unless block_until_ready=False. (discussion in https://github.com/enjoy-digital/litedram/pull/292) This change regenerates with latest litedram and litex 62abf9c ("litedram_gen: Add block_until_ready port parameter to control blocking behaviour.") add2746a ("tools/litex_cli: Rename wb to bus.") Signed-off-by: Matt Johnston <matt@codeconstruct.com.au>
3 years ago
38637bd03c62ffff
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
600000004bfff025
8161000838210090
48000ecc7d708120
794300207fa407b4
3bbd00014bfffaed
7c6a1b787d23db96
7d2918507d29d9d6
7d3f482a79291f48
litedram: disable block_until_ready, regenerate Recent litedram gets stuck at memtest unless block_until_ready=False. (discussion in https://github.com/enjoy-digital/litedram/pull/292) This change regenerates with latest litedram and litex 62abf9c ("litedram_gen: Add block_until_ready port parameter to control blocking behaviour.") add2746a ("tools/litex_cli: Rename wb to bus.") Signed-off-by: Matt Johnston <matt@codeconstruct.com.au>
3 years ago
000000004bffff68
0000068003000000
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
384293903c4c0001
282402007c0802a6
f821ff8148000e39
7c9f23787c7e1b78
418100083b800200
3c62ffff7c9c2378
38637f587fc4f378
600000004bffef9d
4bfff9497fe3fb78
38637f283c62ffff
600000004bffef85
7fc3f3787f84e378
38c000004bfffaa1
7fe4fb7838a00001
7fc3f3787c7d1b78
7d23ea144bfffb99
litedram: disable block_until_ready, regenerate Recent litedram gets stuck at memtest unless block_until_ready=False. (discussion in https://github.com/enjoy-digital/litedram/pull/292) This change regenerates with latest litedram and litex 62abf9c ("litedram_gen: Add block_until_ready port parameter to control blocking behaviour.") add2746a ("tools/litex_cli: Rename wb to bus.") Signed-off-by: Matt Johnston <matt@codeconstruct.com.au>
3 years ago
2c0900007c7e1b78
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
3c62ffff4182007c
7fa4eb787b85f882
4bffef3938637f68
283f008060000000
408100087fe5fb78
3c62ffff38a00080
3880000078a5f082
4bffef1138637f80
litedram: disable block_until_ready, regenerate Recent litedram gets stuck at memtest unless block_until_ready=False. (discussion in https://github.com/enjoy-digital/litedram/pull/292) This change regenerates with latest litedram and litex 62abf9c ("litedram_gen: Add block_until_ready port parameter to control blocking behaviour.") add2746a ("tools/litex_cli: Rename wb to bus.") Signed-off-by: Matt Johnston <matt@codeconstruct.com.au>
3 years ago
3c62ffff60000000
7fc4f3787be5f082
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
4bffeef938637f98
litedram: disable block_until_ready, regenerate Recent litedram gets stuck at memtest unless block_until_ready=False. (discussion in https://github.com/enjoy-digital/litedram/pull/292) This change regenerates with latest litedram and litex 62abf9c ("litedram_gen: Add block_until_ready port parameter to control blocking behaviour.") add2746a ("tools/litex_cli: Rename wb to bus.") Signed-off-by: Matt Johnston <matt@codeconstruct.com.au>
3 years ago
3c62ffff60000000
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
4bffeee938637fb0
litedram: disable block_until_ready, regenerate Recent litedram gets stuck at memtest unless block_until_ready=False. (discussion in https://github.com/enjoy-digital/litedram/pull/292) This change regenerates with latest litedram and litex 62abf9c ("litedram_gen: Add block_until_ready port parameter to control blocking behaviour.") add2746a ("tools/litex_cli: Rename wb to bus.") Signed-off-by: Matt Johnston <matt@codeconstruct.com.au>
3 years ago
3860000060000000
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
7c6307b438210080
3c62ffff48000d98
4bffeec938637fc0
litedram: Regenerate from upstream litex This adds Joel's sdcard feature reporting to the firmware. Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
3 years ago
3860000160000000
litedram: disable block_until_ready, regenerate Recent litedram gets stuck at memtest unless block_until_ready=False. (discussion in https://github.com/enjoy-digital/litedram/pull/292) This change regenerates with latest litedram and litex 62abf9c ("litedram_gen: Add block_until_ready port parameter to control blocking behaviour.") add2746a ("tools/litex_cli: Rename wb to bus.") Signed-off-by: Matt Johnston <matt@codeconstruct.com.au>
3 years ago
000000004bffffe0
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
0000048001000000
384292683c4c0001
8922804060000000
3942803860000000
418200302c090000
litedram: disable block_until_ready, regenerate Recent litedram gets stuck at memtest unless block_until_ready=False. (discussion in https://github.com/enjoy-digital/litedram/pull/292) This change regenerates with latest litedram and litex 62abf9c ("litedram_gen: Add block_until_ready port parameter to control blocking behaviour.") add2746a ("tools/litex_cli: Rename wb to bus.") Signed-off-by: Matt Johnston <matt@codeconstruct.com.au>
3 years ago
39290014e92a0000
7d204eaa7c0004ac
4182ffec71290020
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
e922803860000000
7c604faa7c0004ac
e92a00004e800020
7c0004ac39290010
712900087d204eea
5469063e4082ffec
e942803860000000
litedram: disable block_until_ready, regenerate Recent litedram gets stuck at memtest unless block_until_ready=False. (discussion in https://github.com/enjoy-digital/litedram/pull/292) This change regenerates with latest litedram and litex 62abf9c ("litedram_gen: Add block_until_ready port parameter to control blocking behaviour.") add2746a ("tools/litex_cli: Rename wb to bus.") Signed-off-by: Matt Johnston <matt@codeconstruct.com.au>
3 years ago
7d2057ea7c0004ac
000000004e800020
0000000000000000
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
384291e03c4c0001
fbe1fff87c0802a6
3be3fffffbc1fff0
f821ffd1f8010010
litedram: disable block_until_ready, regenerate Recent litedram gets stuck at memtest unless block_until_ready=False. (discussion in https://github.com/enjoy-digital/litedram/pull/292) This change regenerates with latest litedram and litex 62abf9c ("litedram_gen: Add block_until_ready port parameter to control blocking behaviour.") add2746a ("tools/litex_cli: Rename wb to bus.") Signed-off-by: Matt Johnston <matt@codeconstruct.com.au>
3 years ago
2c1e00008fdf0001
3821003040820010
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
48000cd038600000
litedram: disable block_until_ready, regenerate Recent litedram gets stuck at memtest unless block_until_ready=False. (discussion in https://github.com/enjoy-digital/litedram/pull/292) This change regenerates with latest litedram and litex 62abf9c ("litedram_gen: Add block_until_ready port parameter to control blocking behaviour.") add2746a ("tools/litex_cli: Rename wb to bus.") Signed-off-by: Matt Johnston <matt@codeconstruct.com.au>
3 years ago
4082000c2c1e000a
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
4bffff3d3860000d
4bffff357fc307b4
litedram: disable block_until_ready, regenerate Recent litedram gets stuck at memtest unless block_until_ready=False. (discussion in https://github.com/enjoy-digital/litedram/pull/292) This change regenerates with latest litedram and litex 62abf9c ("litedram_gen: Add block_until_ready port parameter to control blocking behaviour.") add2746a ("tools/litex_cli: Rename wb to bus.") Signed-off-by: Matt Johnston <matt@codeconstruct.com.au>
3 years ago
000000004bffffd0
0000028001000000
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
384291803c4c0001
612900203d20c000
Regenerate litedram and liteeth Note: There are a few patches to upstream to fix an upstream breakage of litedram standalone generator, and fix some issues with liteeth in the way it's used on Wukong. All these have pending pull requests. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
3 years ago
7c0004ac79290020
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
3d40c0007d204eea
614a000879290600
7c0004ac794a0020
714a00207d4056ea
614a20003d40c000
40820040794a0020
f942803860000000
6000000039400000
3d40001c99428040
7d295392614a2000
614a20183d40c000
3929ffff794a0020
7d2057ea7c0004ac
3d00c0004e800020
7908002061080040
7d0046ea7c0004ac
60000000790807e3
3d40001cf9428038
7d495392614a2000
600000004182ffa0
9922804039200001
litedram: disable block_until_ready, regenerate Recent litedram gets stuck at memtest unless block_until_ready=False. (discussion in https://github.com/enjoy-digital/litedram/pull/292) This change regenerates with latest litedram and litex 62abf9c ("litedram_gen: Add block_until_ready port parameter to control blocking behaviour.") add2746a ("tools/litex_cli: Rename wb to bus.") Signed-off-by: Matt Johnston <matt@codeconstruct.com.au>
3 years ago
6108200c3d00c000
790800203920ff80
7d2047aa7c0004ac
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
7c0004ace9228038
e92280387d404faa
litedram: disable block_until_ready, regenerate Recent litedram gets stuck at memtest unless block_until_ready=False. (discussion in https://github.com/enjoy-digital/litedram/pull/292) This change regenerates with latest litedram and litex 62abf9c ("litedram_gen: Add block_until_ready port parameter to control blocking behaviour.") add2746a ("tools/litex_cli: Rename wb to bus.") Signed-off-by: Matt Johnston <matt@codeconstruct.com.au>
3 years ago
39290004794ac202
7d404faa7c0004ac
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
39400003e9228038
litedram: Regenerate from upstream litex This adds Joel's sdcard feature reporting to the firmware. Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
3 years ago
7c0004ac3929000c
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
e92280387d404faa
litedram: Regenerate from upstream litex This adds Joel's sdcard feature reporting to the firmware. Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
3 years ago
7c0004ac39290010
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
e92280387d404faa
litedram: Regenerate from upstream litex This adds Joel's sdcard feature reporting to the firmware. Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
3 years ago
3929000839400007
litedram: Regenerate from upstream litex Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
3 years ago
7d404faa7c0004ac
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
000000004e800020
0000000000000000
3940000078a9e8c2
7d2903a639290001
78a9072442000028
3905000178a50760
7d0903a67d434a14
392000007c844a14
4e80002042000018
7d23512a7d24502a
4bffffcc394a0008
7d0a49ae7d0448ae
4bffffdc39290001
0000000000000000
7c691b7800000000
7d4918ae38600000
4d8200202c0a0000
4bfffff038630001
0000000000000000
2c24000000000000
3881fff040820008
f864000028050024
4d81002038600000
6108ffff3d00fffe
6108d9ff790883e4
89490000e9240000
40810040280a0020
418200542c250000
408200642c050010
4082006c2c0a0030
litedram: disable block_until_ready, regenerate Recent litedram gets stuck at memtest unless block_until_ready=False. (discussion in https://github.com/enjoy-digital/litedram/pull/292) This change regenerates with latest litedram and litex 62abf9c ("litedram_gen: Add block_until_ready port parameter to control blocking behaviour.") add2746a ("tools/litex_cli: Rename wb to bus.") Signed-off-by: Matt Johnston <matt@codeconstruct.com.au>
3 years ago
2c0a007889490001
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
3929000240820060
48000054f9240000
f924000039290001
7d0a56344bffffb8
4182ffec714a0001
4082002c2c250000
4800001c38a0000a
38a0000a2c0a0030
8949000140820010
4182ffb82c0a0078
4800004838600000
4082fff42c050010
4bffffec38a00010
54e7063e38eaffd0
4181003c28070009
7d2a07343929ffd0
4c8000207c0a2800
7c6519d239080001
f90400007d290734
e90400007c691a14
714900ff89480000
4e8000204082ffc0
54e7063e38eaff9f
4181000c28070019
4bffffb83929ffa9
554a063e394affbf
4d810020280a0019
4bffffa03929ffc9
0000000000000000
3923ff9f00000000
4181000828090019
7c6307b43863ffe0
000000004e800020
Regenerate litedram and liteeth Note: There are a few patches to upstream to fix an upstream breakage of litedram standalone generator, and fix some issues with liteeth in the way it's used on Wukong. All these have pending pull requests. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
3 years ago
0000000000000000
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
38428e483c4c0001
480008e97c0802a6
7c7e1b78f821ffa1
7ca32b787cfd3b78
38a0000a7c9c2378
eb3e000038800000
7d1b43787cdf3378
4bfffe597d3a4b78
2b9d001060000000
2c3f000039400000
2c0a00004082005c
3940000140820008
7c0350007d4ad214
7d2350504081003c
792900207d2948f8
7d2903a639290001
7d594850e93e0000
408000187c2ae040
e93e00009b690000
f93e000039290001
382100604200ffe0
409e00104800089c
394a00017bffe102
7fffeb924bffff94
000000004bfffff4
0000078001000000
38428d783c4c0001
480008217c0802a6
eb630000f821ffb1
7c9c23787c7f1b78
3bc000007cbd2b78
4bfffd717fa3eb78
7c3e184060000000
e93f000040800014
7c2ae0407d5b4850
382100504180000c
7d5df0ae4800082c
994900003bde0001
39290001e93f0000
4bffffbcf93f0000
litedram: disable block_until_ready, regenerate Recent litedram gets stuck at memtest unless block_until_ready=False. (discussion in https://github.com/enjoy-digital/litedram/pull/292) This change regenerates with latest litedram and litex 62abf9c ("litedram_gen: Add block_until_ready port parameter to control blocking behaviour.") add2746a ("tools/litex_cli: Rename wb to bus.") Signed-off-by: Matt Johnston <matt@codeconstruct.com.au>
3 years ago
0100000000000000
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
3c4c000100000580
7c0802a638428cfc
e9297fd03d22ffff
7d7080262b860010
916100087caa2b78
f821ffa148000789
7cbe2b787c7c1b78
3be000007cdd3378
3d22fffff9210020
f9210028e9297fd8
408200342c2a0000
408200082c1f0000
7fff07b43be00001
7c3f20402e270000
408100303b7fffff
8161000838210060
4800077c7d708120
794ae102409e0010
4bffffbc3bff0001
4bfffff47d4aeb92
7f5eeb927f5ed378
7d29f0507d3ae9d2
886900207d214a14
5463063e41920010
600000004bfffdd5
e93c00007c3df040
3b7bffff7c69d9ae
e93c00004081ffc8
f93c00007d29fa14
000000004bffff90
0000068003000000
38428c083c4c0001
4800067d7c0802a6
7c7d1b79f821ff01
38600000f8610060
2c24000041820014
3b6100403bc4ffff
382101004082013c
4800069c7c6307b4
390500012c0a0025
38e0000040820620
894500007cbc2b78
38a500017ce93b78
7d47d9ae889c0001
5488063e39470001
418201cc2c080064
4181002c28080078
4181002c28080068
418201302c080058
4181008828080058
418200c02c080025
418201182c08004f
4bffffa438e70001
550b063e3904ff97
4181ffec280b000f
396b74d43d62ffff
7d0b42aa790815a8
7d0903a67d085a14
000001644e800420
litedram: disable block_until_ready, regenerate Recent litedram gets stuck at memtest unless block_until_ready=False. (discussion in https://github.com/enjoy-digital/litedram/pull/292) This change regenerates with latest litedram and litex 62abf9c ("litedram_gen: Add block_until_ready port parameter to control blocking behaviour.") add2746a ("tools/litex_cli: Rename wb to bus.") Signed-off-by: Matt Johnston <matt@codeconstruct.com.au>
3 years ago
ffffffccffffffcc
ffffffccffffffcc
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
0000006cffffffcc
ffffffcc000000cc
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litedram: disable block_until_ready, regenerate Recent litedram gets stuck at memtest unless block_until_ready=False. (discussion in https://github.com/enjoy-digital/litedram/pull/292) This change regenerates with latest litedram and litex 62abf9c ("litedram_gen: Add block_until_ready port parameter to control blocking behaviour.") add2746a ("tools/litex_cli: Rename wb to bus.") Signed-off-by: Matt Johnston <matt@codeconstruct.com.au>
3 years ago
00000048ffffffcc
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
ffffffccffffffcc
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7cea3b78990a0020
394000007d2a4a14
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Regenerate litedram and liteeth Note: There are a few patches to upstream to fix an upstream breakage of litedram standalone generator, and fix some issues with liteeth in the way it's used on Wukong. All these have pending pull requests. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
3 years ago
712900fd3929ffd2
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
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litedram: disable block_until_ready, regenerate Recent litedram gets stuck at memtest unless block_until_ready=False. (discussion in https://github.com/enjoy-digital/litedram/pull/292) This change regenerates with latest litedram and litex 62abf9c ("litedram_gen: Add block_until_ready port parameter to control blocking behaviour.") add2746a ("tools/litex_cli: Rename wb to bus.") Signed-off-by: Matt Johnston <matt@codeconstruct.com.au>
3 years ago
38c000107a8707e0
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
7dc573787c9f2050
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7a8707e0e8810060
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Regenerate litedram and liteeth Note: There are a few patches to upstream to fix an upstream breakage of litedram standalone generator, and fix some issues with liteeth in the way it's used on Wukong. All these have pending pull requests. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
3 years ago
38c0000138e0000a
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
38a1002099490020
7c9ac85039200000
4bfff89d38610060
9b090000e9210060
litedram: disable block_until_ready, regenerate Recent litedram gets stuck at memtest unless block_until_ready=False. (discussion in https://github.com/enjoy-digital/litedram/pull/292) This change regenerates with latest litedram and litex 62abf9c ("litedram_gen: Add block_until_ready port parameter to control blocking behaviour.") add2746a ("tools/litex_cli: Rename wb to bus.") Signed-off-by: Matt Johnston <matt@codeconstruct.com.au>
3 years ago
f921006039290001
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
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litedram: Add simulation support This adds a simulated litedram model along with the necessary Makefile gunk to verilate it and wrap it for use by ghdl. The core_dram_tb test bench is a variant of core_tb with LiteDRAM simulated. It's not built by default, an explicit make core_dram_tb is necessary as to not require verilator to be installed for the normal build process (also it's slow'ish). Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
5 years ago
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litedram: Add support for booting without BRAM This adds an option to disable the main BRAM and instead copy a payload stashed along with the init code in the secondary BRAM into DRAM and boot from there Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
5 years ago
000000204d415242
spi: Add booting from flash to litedram init It will look for an ELF binary at the flash offset specified for the board (currently 0x300000 on Arty but that could be changed). Note: litedram is regenerated in order to rebuild the init code, which was done using a newer version of litedram from LiteX. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
4 years ago
4853414c46495053
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liteeth: Hook up LiteX LiteEth ethernet controller Currently only generated for Arty. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
4 years ago
54454e5245485445
0000000000000020
litedram: Regenerate from upstream litex This adds Joel's sdcard feature reporting to the firmware. Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
3 years ago
0020445241434453
litedram: Regenerate from upstream litex Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
3 years ago
000000000000000a
litedram: Add simulation support This adds a simulated litedram model along with the necessary Makefile gunk to verilate it and wrap it for use by ghdl. The core_dram_tb test bench is a variant of core_tb with LiteDRAM simulated. It's not built by default, an explicit make core_dram_tb is necessary as to not require verilator to be installed for the normal build process (also it's slow'ish). Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
5 years ago
2020202020202020
203a4d4152422020
spi: Add booting from flash to litedram init It will look for an ELF binary at the flash offset specified for the board (currently 0x300000 on Arty but that could be changed). Note: litedram is regenerated in order to rebuild the init code, which was done using a newer version of litedram from LiteX. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
4 years ago
000a424b20646c25
litedram: Add simulation support This adds a simulated litedram model along with the necessary Makefile gunk to verilate it and wrap it for use by ghdl. The core_dram_tb test bench is a variant of core_tb with LiteDRAM simulated. It's not built by default, an explicit make core_dram_tb is necessary as to not require verilator to be installed for the normal build process (also it's slow'ish). Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
5 years ago
2020202020202020
203a4d4152442020
spi: Add booting from flash to litedram init It will look for an ELF binary at the flash offset specified for the board (currently 0x300000 on Arty but that could be changed). Note: litedram is regenerated in order to rebuild the init code, which was done using a newer version of litedram from LiteX. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
4 years ago
000a424d20646c25
litedram: Add support for booting without BRAM This adds an option to disable the main BRAM and instead copy a payload stashed along with the init code in the secondary BRAM into DRAM and boot from there Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
5 years ago
4152442020202020
203a54494e49204d
spi: Add booting from flash to litedram init It will look for an ELF binary at the flash offset specified for the board (currently 0x300000 on Arty but that could be changed). Note: litedram is regenerated in order to rebuild the init code, which was done using a newer version of litedram from LiteX. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
4 years ago
000a424b20646c25
litedram: Add simulation support This adds a simulated litedram model along with the necessary Makefile gunk to verilate it and wrap it for use by ghdl. The core_dram_tb test bench is a variant of core_tb with LiteDRAM simulated. It's not built by default, an explicit make core_dram_tb is necessary as to not require verilator to be installed for the normal build process (also it's slow'ish). Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
5 years ago
2020202020202020
203a4b4c43202020
spi: Add booting from flash to litedram init It will look for an ELF binary at the flash offset specified for the board (currently 0x300000 on Arty but that could be changed). Note: litedram is regenerated in order to rebuild the init code, which was done using a newer version of litedram from LiteX. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
4 years ago
0a7a484d20646c25
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litedram: Add simulation support This adds a simulated litedram model along with the necessary Makefile gunk to verilate it and wrap it for use by ghdl. The core_dram_tb test bench is a variant of core_tb with LiteDRAM simulated. It's not built by default, an explicit make core_dram_tb is necessary as to not require verilator to be installed for the normal build process (also it's slow'ish). Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
5 years ago
20676e69746f6f42
415242206d6f7266
0000000a2e2e2e4d
litedram: Regenerate Regenerate from upstream litex. Something in the update has improved memory read and write performance quite a lot on my Nexys Video: Before: Write speed: 83.2MiB/s Read speed: 140.4MiB/s After: Write speed: 352.1MiB/s Read speed: 218.5MiB/s Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2 years ago
3135636632333936
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spi: Add booting from flash to litedram init It will look for an ELF binary at the flash offset specified for the board (currently 0x300000 on Arty but that could be changed). Note: litedram is regenerated in order to rebuild the init code, which was done using a newer version of litedram from LiteX. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
4 years ago
6620676e69797254
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litedram: Add support for booting without BRAM This adds an option to disable the main BRAM and instead copy a payload stashed along with the init code in the secondary BRAM into DRAM and boot from there Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
5 years ago
20676e6979706f43
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2e4d415244206f74
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415244206d6f7266
0000000a2e2e2e4d
litedram: Regenerate from upstream litex Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
3 years ago
6e69686374697753
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7774666f73206f74
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litedram: Add simulation support This adds a simulated litedram model along with the necessary Makefile gunk to verilate it and wrap it for use by ghdl. The core_dram_tb test bench is a variant of core_tb with LiteDRAM simulated. It's not built by default, an explicit make core_dram_tb is necessary as to not require verilator to be installed for the normal build process (also it's slow'ish). Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
5 years ago
696c616974696e49
litedram: Regenerate from upstream litex Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
3 years ago
52445320676e697a
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0000000000000000
litedram: Regenerate This regenerate litedram for all targets (genesys2 is new in this build) using the latest LiteX. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
4 years ago
64656570736d654d
litedram: Regenerate from upstream litex Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
3 years ago
2820702520746120
0000000000000000
Regenerate litedram and liteeth Note: There are a few patches to upstream to fix an upstream breakage of litedram standalone generator, and fix some issues with liteeth in the way it's used on Wukong. All these have pending pull requests. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
3 years ago
202c6d6f646e6152
0000000000000000
69746e6575716553
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litedram: Regenerate from upstream litex Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
3 years ago
0000000a2e2e2e29
2065746972572020
00203a6465657073
000000000000732f
2064616552202020
00203a6465657073
litedram: Regenerate This regenerate litedram for all targets (genesys2 is new in this build) using the latest LiteX. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
4 years ago
20747365746d654d
litedram: Regenerate from upstream litex Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
3 years ago
0028207025207461
7265207375622020
litedram: Regenerate This regenerate litedram for all targets (genesys2 is new in this build) using the latest LiteX. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
4 years ago
2520203a73726f72
00000a646c252f64
litedram: Regenerate from upstream litex Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
3 years ago
6520726464612020
litedram: Regenerate This regenerate litedram for all targets (genesys2 is new in this build) using the latest LiteX. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
4 years ago
25203a73726f7272
00000a646c252f64
litedram: Regenerate from upstream litex Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
3 years ago
6520617461642020
litedram: Regenerate This regenerate litedram for all targets (genesys2 is new in this build) using the latest LiteX. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
4 years ago
25203a73726f7272
00000a646c252f64
20747365746d654d
00000000000a4f4b
20747365746d654d
litedram: Regenerate from upstream litex Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
3 years ago
60000000000a4b4f
3736353433323130
6665646362613938
0000000000000000
0000000000007830
litedram: Add simulation support This adds a simulated litedram model along with the necessary Makefile gunk to verilate it and wrap it for use by ghdl. The core_dram_tb test bench is a variant of core_tb with LiteDRAM simulated. It's not built by default, an explicit make core_dram_tb is necessary as to not require verilator to be installed for the normal build process (also it's slow'ish). Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
5 years ago
0000000000000000
00000000000000ff
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00000000ffffffff
000000ffffffffff
0000ffffffffffff
00ffffffffffffff
ffffffffffffffff