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1.8 KiB
1.8 KiB
| 1 | #-------------------------------------------------------------------------------- |
|---|---|
| 2 | # Auto-generated by Migen (7507a2b) & LiteX (feca1c47) on 2021-11-11 13:01:55 |
| 3 | #-------------------------------------------------------------------------------- |
| 4 | csr_base,ctrl,0xfff00800,, |
| 5 | csr_base,identifier_mem,0xfff01000,, |
| 6 | csr_base,timer0,0xfff01800,, |
| 7 | csr_base,uart,0xfff02000,, |
| 8 | csr_register,ctrl_reset,0xfff00800,1,rw |
| 9 | csr_register,ctrl_scratch,0xfff00804,1,rw |
| 10 | csr_register,ctrl_bus_errors,0xfff00808,1,ro |
| 11 | csr_register,timer0_load,0xfff01800,1,rw |
| 12 | csr_register,timer0_reload,0xfff01804,1,rw |
| 13 | csr_register,timer0_en,0xfff01808,1,rw |
| 14 | csr_register,timer0_update_value,0xfff0180c,1,rw |
| 15 | csr_register,timer0_value,0xfff01810,1,ro |
| 16 | csr_register,timer0_ev_status,0xfff01814,1,ro |
| 17 | csr_register,timer0_ev_pending,0xfff01818,1,rw |
| 18 | csr_register,timer0_ev_enable,0xfff0181c,1,rw |
| 19 | csr_register,uart_rxtx,0xfff02000,1,rw |
| 20 | csr_register,uart_txfull,0xfff02004,1,ro |
| 21 | csr_register,uart_rxempty,0xfff02008,1,ro |
| 22 | csr_register,uart_ev_status,0xfff0200c,1,ro |
| 23 | csr_register,uart_ev_pending,0xfff02010,1,rw |
| 24 | csr_register,uart_ev_enable,0xfff02014,1,rw |
| 25 | csr_register,uart_txempty,0xfff02018,1,ro |
| 26 | csr_register,uart_rxfull,0xfff0201c,1,ro |
| 27 | constant,config_clock_frequency,100000000,, |
| 28 | constant,config_cpu_has_interrupt,None,, |
| 29 | constant,config_cpu_reset_addr,0,, |
| 30 | constant,config_cpu_type_a2p,None,, |
| 31 | constant,config_cpu_variant_standard,None,, |
| 32 | constant,config_cpu_human_name,a2p_wb,, |
| 33 | constant,config_cpu_nop,nop,, |
| 34 | constant,config_with_build_time,None,, |
| 35 | constant,uart_polling,None,, |
| 36 | constant,config_csr_data_width,32,, |
| 37 | constant,config_csr_alignment,32,, |
| 38 | constant,config_bus_standard,wishbone,, |
| 39 | constant,config_bus_data_width,32,, |
| 40 | constant,config_bus_address_width,32,, |
| 41 | constant,timer0_interrupt,1,, |
| 42 | constant,uart_interrupt,0,, |
| 43 | memory_region,rom,0x00000000,65536,cached |
| 44 | memory_region,sram,0x00100000,524288,cached |
| 45 | memory_region,csr,0xfff00000,65536,io |