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# a2o tb
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# make -f Makefile.icarus build # rebuild and sim and fst
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# make -f Makefile.icarus run # sim and fst
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# make -f Makefile.icarus # sim
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#COCOTB_LOG_LEVEL=DEBUG
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#GPI_EXTRA=vpi
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#COCOTB_RESOLVE_X = ZEROS # VALUE_ERROR ZEROS ONES RANDOM
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SIM_BUILD ?= build_st
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SIM ?= icarus
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# options
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#COCOTB_HDL_TIMEUNIT ?= 1ns
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#COCOTB_HDL_TIMEPRECISION ?= 1ps
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#COCOTB_RESOLVE_X = VALUE_ERROR # ZEROS ONES RANDOM
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# icarus
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#
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# includes are needed for *.vh
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# unisims is for FPGA RAMs
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# coco forces -g2012 for some reason, and appends it after COMPILE_ARGS below! issue #781
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VERILOG_ROOT = ../../verilog
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COMPILE_ARGS = -I$(VERILOG_ROOT)/trilib -I$(VERILOG_ROOT)/work -y$(VERILOG_ROOT)/unisims -y$(VERILOG_ROOT)/trilib_clk1x -y$(VERILOG_ROOT)/trilib -y$(VERILOG_ROOT)/work
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# other options
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# rtl
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TOPLEVEL_LANG = verilog
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# top-level to enable trace, etc.
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VERILOG_SOURCES = ./cocotb_icarus.v
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TOPLEVEL = cocotb_icarus
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# python test
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MODULE = tb
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# cocotb make rules
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include $(shell cocotb-config --makefiles)/Makefile.sim
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build: clean sim fst
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run: sim fst
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vcd: sim
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fst:
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vcd2fst wtf-coco.vcd wtf-coco.fst
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rm wtf-coco.vcd
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