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13 lines
705 B
Plaintext
13 lines
705 B
Plaintext
3 years ago
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## Settings to generate MSC file
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# Configuration from SPI Flash as per XAPP1233
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set_property BITSTREAM.GENERAL.COMPRESS TRUE [current_design]
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set_property BITSTREAM.CONFIG.EXTMASTERCCLK_EN DIV-1 [current_design]
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set_property BITSTREAM.CONFIG.SPI_32BIT_ADDR YES [current_design]
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set_property BITSTREAM.CONFIG.SPI_BUSWIDTH 8 [current_design]
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set_property BITSTREAM.CONFIG.SPI_FALL_EDGE YES [current_design]
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# Set CFGBVS to GND to match schematics
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set_property CFGBVS GND [current_design]
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# Set CONFIG_VOLTAGE to 1.8V to match schematics
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set_property CONFIG_VOLTAGE 1.8 [current_design]
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# Set safety trigger to power down FPGA at 125degC
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set_property BITSTREAM.CONFIG.OVERTEMPSHUTDOWN Enable [current_design]
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