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@ -1,8 +1,6 @@
#!Makefile

HUGO=hugo-extended
HUGO_NUMWORKERMULTIPLIER=64
HUGO_MEMORYLIMIT=32
BUILDNAME:=$(shell git rev-parse --abbrev-ref HEAD)
BASEURL:=$(shell basename `pwd` | sed 's/_/./g')
BRANCHES:=$(shell git branch -r | sed 's/origin\///g' | sed 's/pr\//pr-/' | sed '/HEAD/d' | sed '/master/d' | sed '/main/d')
@ -30,7 +28,7 @@ build-staging:

.PHONY: test
test: clean
HUGO_NUMWORKERMULTIPLIER=$(HUGO_NUMWORKERMULTIPLIER) HUGO_MEMORYLIMIT=$(HUGO_MEMORYLIMIT) $(HUGO) --environment=development --minify --printMemoryUsage --printPathWarnings --printUnusedTemplates --templateMetrics --templateMetricsHints
$(HUGO) --environment=development --minify --templateMetrics --templateMetricsHints --memstats hug_mem_log

.PHONY: draft
draft:

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@ -2,10 +2,10 @@
title = "OpenPOWER Foundation"
baseURL = "https://openpower.foundation/"
theme = "openpowerfoundation"
#languageCode = "opf"
#defaultContentLanguage = "opf"
#defaultContentLanguageInSubdir = true
#enableMissingTranslationPlaceholders = true
languageCode = "opf"
defaultContentLanguage = "opf"
defaultContentLanguageInSubdir = true
enableMissingTranslationPlaceholders = true
dataDir = "data"
assetDir = "assets"
PaginatePath = ""
@ -22,14 +22,6 @@ enableEmoji = true
noJSConfigInAssets = false
# useResourceCacheWhen = 'always'
writeStats = true
[build.buildStats]
enable = true
disableClasses = false
disableIDs = false
disableTags = false
[[build.cacheBusters]]
source = '(postcss|tailwind)\.config\.js'
target = '(css|styles|scss|sass)'

[outputs]
home = [ "HTML" , "RSS" ]
@ -149,20 +141,20 @@ enableEmoji = true
[caches]
[caches.assets]
dir = ':resourceDir/_gen'
maxAge = -1
maxAge = "5m"
[caches.getcsv]
dir = ':cacheDir/:project'
maxAge = -1
maxAge = "5m"
[caches.getjson]
dir = ':cacheDir/:project'
maxAge = -1
dir = ':cacheDir/:project'
maxAge = "5m"
ttl = 300
[caches.getresource]
dir = ':cacheDir/:project'
maxAge = -1
maxAge = "5m"
[caches.images]
dir = ':resourceDir/_gen'
maxAge = -1
maxAge ="5m"
[caches.modules]
dir = ':cacheDir/modules'
maxAge = -1
maxAge = "5m"

@ -1,11 +1,11 @@
#!parms.toml
[forms.contact]
URI = "http://localhost:8080/forms/contactus/opf"
URI = "http://localhost:8080/forms/contactus/test/opf"
[forms.hub]
URI = "http://localhost:8080/forms/hub/opf"
URI = "http://localhost:8080/forms/hub/test/opf"
[forms.isarfc]
URI = "http://localhost:8080/forms/isarfc/opf"
URI = "http://localhost:8080/forms/isarfc/test/opf"
[forms.passport]
URI = "http://localhost:8080/forms/passport/opf"
URI = "http://localhost:8080/forms/passport/test/opf"
[forms.mailmonk]
URI = "http://localhost:9000/subscription/form"

@ -3,12 +3,12 @@
URI = "stats.vantosh.com"
ID = "69"
[forms.contact]
URI = "https://webscripts.vantosh.com/forms/contactus/opf"
URI = "https://webscripts.vantosh.com/forms/contactus/prod/opf"
[forms.hub]
URI = "https://webscripts.vantosh.com/forms/hub/opf"
URI = "https://webscripts.vantosh.com/forms/hub/prod/opf"
[forms.isarfc]
URI = "https://webscripts.vantosh.com/forms/isarfc/opf"
URI = "https://webscripts.vantosh.com/forms/isarfc/prod/opf"
[forms.passport]
URI = "https://webscripts.vantosh.com/forms/passport/opf"
URI = "https://webscripts.vantosh.com/forms/passport/prod/opf"
[forms.mailmonk]
URI = "https://mailing.openpower.foundation/subscription/form"

@ -1,315 +0,0 @@
---
title: coreboot and Heads as an alternative firmware for OpenPOWER Talos II
author: Krystian Hebel (3mdeb)
tags:
- openpower
- power9
- firmware
- coreboot
- hostboot
date: 2024-10-08
draft: false
---

This blog post presents coreboot ([spelled in lower case characters](https://doc.coreboot.org/#spelling-of-coreboot),
even when it is the first word in a sentence) and Heads as an alternative to
Hostboot and Skiroot/Petitboot, respectively. The project was extensive, a list
of changes (incomplete!) can be found in [this issue](https://github.com/linuxboot/heads/issues/1729).
The work was paid through [Open Collective funds](https://opencollective.com/3mdeb_com)
and Insurgo personal investments, as well as 3mdeb investment and [NGI0 PET fund](https://nlnet.nl/project/AccessibleSecurity/).
It took 3 years so far, with results available as part of [Dasharo firmware distribution](https://www.dasharo.com/).

As described on the [project's page](https://coreboot.org),

> coreboot is an extended firmware platform that delivers a lightning fast and
> secure boot experience on modern computers and embedded systems.

{{< image src="blog/coreboot.png" width="900" height="900" >}}

It aims to do the bare minimum required to make the hardware usable and pass
the control to next program, called the payload. In case of Talos II, that
payload is Skiboot, with [few changes on top](https://github.com/Dasharo/skiboot/tree/raptor-cs_talos-2)
to make it play along with Heads.

Speaking of [Heads](https://github.com/linuxboot/heads), it is:

> a minimal Linux that (...) provides a secure, flexible boot environment for
laptops, workstations and servers.

Heads provides a bootloader menu that starts final operating system through
kexec call. This is very similar to what Petitboot does, but Heads puts
security above everything else.

It is possible to use coreboot without Heads, but not the other way around.
Heads depends on structures created by coreboot, which just aren't present when
booting with Hostboot.

## Building and flashing coreboot

To build coreboot image, follow the steps below:

1. Clone the coreboot repository:

```
git clone https://github.com/Dasharo/coreboot.git \
--depth=1 -b raptor-cs_talos-2/rel_v0.7.0
```

2. Start docker container:

```
cd coreboot
docker run --rm -it \
-v $PWD:/home/coreboot/coreboot \
-w /home/coreboot/coreboot \
-u "$(id -u):$(id -g)" \
coreboot/coreboot-sdk:0ad5fbd48d /bin/bash
```

3. Configure and start the build process inside of the container:

```
(docker) cp configs/config.raptor-cs-talos-2 .config
(docker) make olddefconfig
(docker) make
```
After image is built you can exit the container, either with `exit` or Ctrl+D.
To flash it to your platform:

0. Make sure you're running System Package v2.00, if not, get it from
[here](https://wiki.raptorcs.com/wiki/Talos_II/Firmware) and
[update/downgrade](https://wiki.raptorcs.com/wiki/Updating_Firmware#Updating_the_OpenPOWER_firmware).
Start the platform once so SEEPROM is also updated, then power off.

1. Copy images to BMC:

```
scp -O build/bootblock.signed.ecc root@<BMC_IP>:/tmp/bootblock.signed.ecc
scp -O build/coreboot.rom.signed.ecc root@<BMC_IP>:/tmp/coreboot.rom.signed.ecc
```

2. Log in to BMC through SSH:

```
ssh root@<BMC_IP>
```

3. Flash both partitions:

```
pflash -e -P HBB -p /tmp/bootblock.signed.ecc
pflash -e -P HBI -p /tmp/coreboot.rom.signed.ecc
```

4. Boot the platform as usual and enjoy coreboot running on Talos II:

[![asciicast](https://asciinema.org/a/zkQV1KhxY4n6IrlzssuvFHHS5.svg)]https://asciinema.org/a/zkQV1KhxY4n6IrlzssuvFHHS5

## Building and flashing Heads

Reminder: Heads requires coreboot. Instructions above **must** be performed
before flashing Heads. It also requires a [compatible USB security dongle](https://osresearch.net/Prerequisites#usb-security-dongles-aka-security-token-aka-smartcard)
and TPM (more about it later).

> Technically, TPM isn't a hard requirement of Heads, however its usefulness
> without it is very limited, up to a point where it doesn't have any advantages
> over Petitboot.

1. Just as earlier, start with cloning the repository:

```
git clone https://github.com/Dasharo/heads.git \
--depth=1 -b raptor-cs_talos-2/release
```

2. Start docker container:

```
cd heads
docker run --rm -it \
-v $PWD:/home/heads/heads \
-w /home/heads/heads \
-u "$(id -u):$(id -g)" \
3mdeb/heads-docker:2.4.0 /bin/bash
```

3. Build:

```
(docker) make BOARD=talos-2
```

This will take a while, wait for it to finish and then exit the container. In
the process, a coreboot image will also be built, but with slightly different
configuration. For security and reproducible images, `BUILD_TIMELESS` is always
enabled. While it actually strips file paths, it also removes file names and
line numbers from asserts in the code. It makes reporting and debugging
potential issues harder, so we suggest using coreboot built manually, at least
for the time being.

Steps for flashing Heads are similar to those done for coreboot.

1. Copy the Heads binary to the BMC (assuming in the Heads root directory):

```
scp -O build/zImage.bundled root@<BMC_IP>:/tmp/zImage.bundled
```

2. Log in to the BMC:

```
ssh root@<BMC_IP>
```

3. Flash the BOOTKERNEL partition with Heads:

```
pflash -e -P BOOTKERNEL -p /tmp/zImage.bundled
```

Answer yes to the prompt and wait for the process to finish. After that, start
the platform and begin [configuring Heads](https://osresearch.net/Configuring-Keys/).

## PNOR emulation

Flash device can be emulated by BMC, which is something we were often using for
development and testing. This saves a lot of time which would be spent flashing,
as well as reduces the wear of flash device.

However, this still requires System Package v2.00, and if this is different than
what real flash holds, SEEPROM will have to be updated when switching between
physical and emulated image. Also, this approach doesn't survive BMC reboots and
power losses. BMC doesn't have enough space to keep full PNOR image in
non-volatile memory, so `tmpfs` must be used for emulation. Don't try to put
more than one image in `tmpfs` or BMC **will** run out of RAM, which most likely
will require manual power cycle.

To start, obtain full flash image, either by downloading it from
[RaptorCS release page](https://wiki.raptorcs.com/wiki/Talos_II/Firmware) or
reading from existing image on BMC with:

```
pflash -r /tmp/talos.pnor
```

After that, you can "flash" the partitions mentioned earlier by adding
additional parameters to use the file instead of physical flash:

```
pflash -f -P <partition> -p <image_file> -F /tmp/talos.pnor
```

Change `<partition>` to one of `HBB`, `HBI`, `BOOTKERNEL` and `<image_file>` to
`/tmp/bootblock.signed.ecc`, `/tmp/coreboot.rom.signed.ecc` or
`/tmp/zImage.bundled`, respectively.

To tell BMC to present the contents of this file as flash, run:

```
mboxctl --backend file:/tmp/talos.pnor
```

Sometimes this command fails with a timeout, in that case run it again until it
succeeds.

> We've noticed that sometimes, despite no error message printed, physical flash
> was used anyway. It is easy to spot when one copy has Hostboot and the other
> has coreboot, but it can be missed when both images have different versions of
> coreboot. It caused us few hours of unnecessary debugging of issues that were
> already fixed...

With the file now mounted, platform can be started. Host firmware and OS
shouldn't be able to tell the difference, except for different reported erase
block size and maybe different access times.

To get back to original flash, run:

```
mboxctl --backend vpnor
```

It will report an error (`Failed to post message: Connection timed out`), but
will revert to physical device nonetheless. This can be confirmed by checking
the output of `mboxctl --lpc-state`:

```
root@talos:~# mboxctl --lpc-state
LPC Bus Maps: Flash Device
```

Since the file is now the full image with coreboot (and optionally Heads), it
can be simply written to flash, should you choose to accept it:

```
pflash -E -p /tmp/talos.pnor
```

## Noticeable differences between Hostboot and coreboot

For those wondering why we even started this project, here are some of the
differences between Hostboot and coreboot.

First of all, coreboot uses C, while Hostboot was written in C++. The latter can
be viewed as a complete operating system - it can use multiple threads
simultaneously, manages virtual memory and uses memory swapping (even before RAM
is trained). Each major [istep](https://wiki.raptorcs.com/w/images/b/bd/IPL-Flow-POWER9.pdf)
(IPL Step, which in turn stands for Initial Program Load) is a separate
application, with some common dynamically loaded libraries. coreboot, on the
other hand, runs all of the code in just 3 separate stages - bootblock, romstage
and ramstage. This allows for tighter linking process, which reduces the final
size of the code.

Another significant difference is reduced amount of RAS (Reliability,
Availability, Serviceability) features enabled in coreboot. Talos II is often
used as a workstation, and while RAS has its uses in servers (it is preferred
to start with partially working hardware than not starting at all), for home
users booting fast is usually more important. Because of that coreboot doesn't
support bad DQ masking for DRAM, it can also optionally skip initial RAM
scrubbing. Because of these reasons, as well as smaller size of code in general,
booting coreboot is significantly faster than Hostboot - some preliminary
results can be found [here](https://github.com/3mdeb/openpower-coreboot-docs/blob/main/devnotes/user_perspective.md).

Another technical difference is the way data is passed to Skiboot. Hostboot uses
HDAT - a format specific to this particular firmware. For coreboot, a device
tree conforming to a well-defined specification is used. In fact, Skiboot
internally converts HDAT to device tree anyway. At the moment, some information
is not presented by coreboot (https://github.com/Dasharo/dasharo-issues/issues/446,
https://github.com/Dasharo/dasharo-issues/issues/32), but those seem to be
rather cosmetic than anything else - if you know about something that requires
those pieces of information to be present, let us know.

## TPM

TPM is an integral part of security mechanisms added by Heads. As existing I2C
TPMs were [hard to obtain](https://github.com/3mdeb/openpower-coreboot-docs/blob/main/devnotes/tpm_over_i2c.md)
at the time we were working on this part of the project, and LPC TPMs couldn't
be used [due to the way POWER9 processor exposed access to LPC bus](https://github.com/3mdeb/openpower-coreboot-docs/blob/main/devnotes/tpm_over_lpc.md#tpm-over-lpc-interface),
we had to [consider other options](https://github.com/3mdeb/openpower-coreboot-docs/blob/main/devnotes/tpm.md).

The solution we ended up with was to create our own [I2C TPM 1.2 module](https://docs.dasharo.com/variants/talos_2/tpm-support/),
based on Infineon SLB9645TT1.2 chip. This chip isn't supported by drivers in
Hostboot and upstream Skiboot, to make use of it you have to use coreboot and
Dasharo's fork of Skiboot.

{{< image src="blog/TPM-1.2-Talos-II.jpg" >}}

## Links and references

Here are some links to documentation related to this project:

- [main user documentation page](https://docs.dasharo.com/variants/talos_2/overview/)
- [release notes and binaries](https://docs.dasharo.com/variants/talos_2/releases/)
- [list of known issues](https://github.com/Dasharo/dasharo-issues/labels/raptor-cs_talos-2),
if you want to create new issue remember to add proper tag
- [scripts for dumping debug data and logs](https://github.com/3mdeb/openpower-coreboot-docs/tree/main/devnotes/scripts)
- [dump of SCOM accesses and other debug output divided by isteps](https://github.com/3mdeb/openpower-coreboot-docs/tree/main/logs/scom_dumps)
- [other uncategorized developer notes](https://github.com/3mdeb/openpower-coreboot-docs/blob/main/devnotes)
- [Open Source Firmware Slack channel dedicated to coreboot on OpenPOWER](https://osfw.slack.com/archives/C01BHE47JSW)

We invite you to test for yourselves and share the results, both good and bad,
either on channels listed above or in issue.

The OpenPOWER Talos II running coreboot and heads was presented on Open Source
Firmware Conference 2024 in Bochum, Germany. Video from the presentaion is
availabel at [Vimeo](https://vimeo.com/1007701325).

@ -1,35 +0,0 @@
---
title: Solid Silicon Joins OpenPOWER Foundation
categories:
- blogs
tags:
- openpower
- openpower-foundation
- linux-foundation
- open-source
- cloud
- open-source-hardware
- member
date: 2024-06-13
draft: false
---

Today, we are pleased to announce that Solid Silicon, a fabless semiconductor company based in Colorado, US, has joined the OpenPOWER Foundation as a Platinum member.

The OpenPOWER Foundation is committed to an open, community-driven technology development process, which is critical to the continued growth of open collaboration around the POWER architecture.

"_OpenPOWER Foundation is pleased to welcome Solid Silicon to the foundation and our community, and looks forward to our collaboration in community-driven open development that broadens customer computing choice_", said [James Kulina](https://www.linkedin.com/in/james-kulina/), Executive Director, OpenPOWER Foundation.

Solid Silicon Corporation is developing open source software and secure chip designs based on standardized, self-sovereign, future-proof silicon to give developers the ability to own, control, and trust their computing devices down to the silicon.

Solid Silicon currently is [developing](https://www.linkedin.com/posts/solid-silicon_raptor-computing-sys-on-x-activity-7121183443475992576-kq_A?utm_source=share&utm_medium=member_desktop) two new silicon devices based on the OpenPOWER ISA. The first is the X-class chip line that targets Edge/IoT applications while the second line, the S-class chip, targets Data Center applications. Both chip lines will adopt the latest POWER ISA 3.1 specifications leading to new product capabilities within the OpenPOWER ecosystem.

"_Solid Silicon's OpenPOWER CPUs are built on and fully comply with the open, standardized POWER ISA administered by the OpenPOWER Foundation. This commitment to open standards ensures that our customers benefit from the latest advancements in processor technology, while also providing the transparency and security that comes from an open and unified software ecosystem. In our view, the vendor-neutral approach to ISA standardization that the OpenPOWER Foundation provides is crucial to both avoiding vendor lock-in and ensuring a diverse software ecosystem while simultaneously ensuring long-term application compatibility._", said [Tim Pearson](https://www.linkedin.com/company/solid-silicon/), CTO and Founder.

"_At a fundamental level, akin to public cryptography, the entire OpenPOWER architecture and standard are open, auditable, and completely verifiable. With Solid Silicon's firmware, software, and tools also being fully open source, our customers benefit immensely by deploying self-sovereign silicon solutions from the edge to the data center. We are thrilled to partner with the OpenPOWER Foundation to foster and expand this incredible developer community_", says [Todd Rooke](https://www.linkedin.com/in/toddrooke/), CEO and Founder.

The OpenPOWER Foundation looks forward to collaborating with Solid Silicon
in developing new and exciting POWER based silicon through open standards and community driven collaboration.

Learn more about [Solid Silicon](https://solidsilicon.com).

@ -1,7 +1,7 @@
---
title: "David Calderwood"
position: "President"
weight: 100
position: "Director"
weight: 3000
date: 2023-03-29
start: 2023-03-27
end: 2025-03-27

@ -1,7 +1,7 @@
---
title: "James Kulina"
position: "Executive Director"
weight: 150
weight: 100
date: 2021-03-03
start: 2020-03-30
end: 2034-12-31

@ -1,7 +1,7 @@
---
title: "Meow Yee"
position: "Director"
weight: 1000
position: "President"
weight: 10
date: 2023-03-29
start: 2023-03-27
end: 2025-03-27

@ -1,9 +1,9 @@
---
title: "Timothy Pearson"
position: "Chairman"
weight: 1
date: 2024-06-27
start: 2024-06-14
end: 2026-06-14
position: "Director"
weight: 3000
date: 2021-03-03
start: 2021-01-30
end: 2023-03-27
draft: false
---

@ -1,25 +0,0 @@
---
title: "IBM TechXchange 2024"
eventdates:
from: 2024-10-21
eventplace: San Jose, CA
register: https://reg.tools.ibm.com/flow/ibm/techxchange24/reg/
schedule: https://reg.tools.ibm.com/flow/ibm/techxchange24/sessioncatalog/page/sessioncatalog?tab.sessioncatalogtabs=option_1601178495160
date: 2024-10-17
draft: false
---

The OpenPOWER Foundation is participating at [IBM TechXchange 2024 event](https://www.ibm.com/community/ibm-techxchange-conference/). We will be giving a talk on in the OSS track with our member company [Solid Silicon](https://solidsilicon.com/desktop/index.html), who is developing next generation POWER processors.

Come to our talk on Monday Oct. 21st.
[Open Comuting Built on OpenPOWER](https://reg.tools.ibm.com/flow/ibm/techxchange24/sessioncatalog/page/sessioncatalog?search=open%20source&tab.sessioncatalogtabs=option_1601178495160#:~:text=computing%20built%20on-,OpenPOWER,-%5B4158%5D)

OpenPOWER will also be showcasing within the IBM POWER booth. Please stop by and say Hello!








@ -1,23 +0,0 @@
---
title: "Open Compute North American Summit 2024"
eventdates:
from: 2024-10-15
eventplace: San Jose, CA
register: https://2024ocpregional.fnvirtual.app/
schedule: https://2024ocpregional.fnvirtual.app/a/schedule/
date: 2024-09-16
draft: false
---

The OpenPOWER Foundation is a sponsor with booth #C52. We will be sharing our booth with [Solid Silicon](https://solidsilicon.com/desktop/index.html), who is developing next generation POWER processors. Stop by and say hello!

[OCP24 registration link](https://www.opencompute.org/summit/global-summit/registration)


The OCP Summit is the premier event uniting the most forward-thinking minds in open IT Ecosystem development. The Summit presents a unique platform for our Community from around the globe to share their insights, foster partnerships and showcase cutting-edge advancements in open hardware and software.

The 2024 OCP Global Summit theme is "From Ideas to Impact". This encapsulates the transformative journey at the heart of the Open Compute Project. This year's theme reflects OCP's commitment to fostering innovation that transcends theoretical discussions and manifests into real-world solutions. As the pace of technological evolution accelerates and development cycles shorten, our industry is forced to rapidly respond to emerging trends and needs. By harnessing the collective expertise of our global community, we turn visionary ideas into groundbreaking technologies that drive openness, efficiency, sustainability, scalability and growth in the data center industry. Our focus honors the relentless pursuit of progress and the profound impact that OCP's community-driven innovation can achieve. OCP transforms concepts into impactful advancements.




@ -1,28 +0,0 @@
---
title: "Open Compute Regional Summit 2024 - Future Technologies Symposium"
eventdates:
from: 2024-04-24
eventplace: Lisbon, Portugal
register: https://2024ocpregional.fnvirtual.app/
schedule: https://2024ocpregional.fnvirtual.app/a/schedule/
date: 2024-04-21
draft: false
---

The OCP Regional Summit in Europe serves as a platform where technical and business leaders from EMEA come together to tackle crucial issues related to data center sustainability, energy efficiency, and heat reuse. The focus is on exploring how innovations from hyperscale data center operators can contribute to solving these challenges. The Summit also highlights deployments of specific OCP-recognized data center equipment in the EMEA region.

```
OPF FTS Talk
Time: 3:55pm – 4:15pm
Location: Lisbon Congress Centre
```

The OpenPOWER Foundation will be sharing a talk with Jabil in the Future Technologies Symposium.

"Large Memory Server Design Overview"
Abstract:
With the advancement of AI workloads and their increasingly large data set requirements, the need for high memory capacity and density is becoming paramount for the industry. There have been advances in memory connectivity that promise to deliver solutions that will meet these needs. This specification shows a design that utilizes two of these technologies, OpenCAPI Memory Interface (OMI) and Compute Express Link (CXL), to deliver from 24TB to a potentially jaw-dropping 32TB of memory in an air-cooled, single socket OCP DC-MHS inspired 19’’ 2U chassis. This design solution, a collaboration between the OpenPower Foundation, Jabil Inc.,Raptor Computing Systems, SAP, and Wooden Data Center, is currently in the design phase. In this specification, physical limitations, interconnects, and power/thermal constraints will be highlighted. The end goal would be to contribute this design specification to the OCP community.

{{< youtube 3UOMUHFFYvQ >}}

[Video Recording](https://www.youtube.com/watch?v=3UOMUHFFYvQ)

@ -1,37 +0,0 @@
---
title: "Open Hardware and Software Mini Summit at the Open Source Summit North America"
eventdates:
from: 2024-04-15
eventplace: Seattle, US
register: https://events.linuxfoundation.org/open-source-summit-north-america/register/
schedule: https://docs.google.com/spreadsheets/d/1F6hJQL8nU538OlGDGiOcrvSGuDMbCbK4R37qGrq5qSg/edit?usp=sharing
date: 2024-03-06
draft: false
---

```
Time: 1:00pm – 5:45pm
Location: Seattle Convention Center | Summit
Registration Cost: $15
```


This half day program will Introduce the audience to the many aspects of open source hardware and software development, and how it is helping the industry to accelerate beyond what Moore’s law has predicted.


Talks will cover numerous aspects of hardware / software development and provide motivation to learn more about the challenges of open hardware and software design together.


Agenda:

- How can software developers help keep Moore’s law alive?
- Open Hardware Design: Lessons Learned from OSS
- Understanding hardware security vulnerabilities : Hardware Bill of Materials
- Scaling hardware design: squeezing every bit of performance of the open source OpenROAD ASIC toolchain
- Accelerating EDA Flows in the AWS Cloud
- An Introduction to RISC-V
- Accelerating the RISC-V Software Development Ecosystem
- Caliptra: open source Root of Trust
- Getting “Ware” You Need to Go – Managing OpenPOWER Hardware with Software (Part 1)
- Getting “Ware” You Need to Go – AI Software on OpenPOWER Hardware (Part 2)

@ -3,6 +3,7 @@ title: 'Memory SIG'
wgtype: sig
image: thumb-1.jpg
chair:
- pierreluccantin
- curtwollbrink
participation: Members
date: 2021-03-15

@ -84,13 +84,15 @@ operatingsystems:
- Alma Linux 8
- Alma Linux 9
- Alpine
- CentOS Stream 8 (GPU)
- CentOS Stream 9 (GPU)
- Debian 10
- Debian 11
- Debian 12
- Fedora [latest]
- Ubuntu 18.04
- Ubuntu 20.04 (GPU)
- Ubuntu 22.04 (GPU)
- Ubuntu 24.04 (GPU)
unavailable:
weight: -9000
date: 2022-08-24

@ -5,7 +5,6 @@ country: USA
link: https://axiado.com
level: silver
joined: 2022
cancelled: 2024-07-05
date: 2022-10-16
draft: false
---

@ -5,7 +5,6 @@ country: Italy
link: https://axyon.ai/
level: silver
joined: 2019
cancelled: 2024-07-23
date: 2021-03-31
draft: false
---

@ -6,6 +6,5 @@ link: https://www.bioretics.com/
level: silver
joined: 2019
date: 2021-03-31
cancelled: 2024-06-27
draft: false
---

@ -6,6 +6,5 @@ link: https://www.codee.com/
level: silver
joined: 2019
date: 2021-03-31
cancelled: 2024-06-05
draft: false
---

@ -6,6 +6,5 @@ link: https://www.emdion.com/
level: silver
joined: 2019
date: 2021-03-31
cancelled: 2024-06-19
draft: false
---

@ -6,6 +6,5 @@ link: https://juliacomputing.com/
level: silver
joined: 2019
date: 2021-03-31
cancelled: 2024-07-02
draft: false
----

@ -1,10 +0,0 @@
---
title: Loyola Institute of Technology
image: loyolainstitute.png
country: India
link: https://www.lit.edu.in/
level: academic
joined: 2017
date: 2021-03-31
draft: false
---

@ -1,10 +0,0 @@
---
title: Power Maroc
image: powerm.png
country: Morocco
link: https://powerm.ma/
level: silver
joined: 2024
date: 2024-01-01
draft: false
---

@ -6,6 +6,5 @@ link: https://yiyuan.ai/
level: silver
joined: 2019
date: 2021-03-31
cancelled: 2024-07-03
draft: false
---

@ -1,12 +0,0 @@
---
title: Solid Silicon
image: solidsilicon.png
country: USA
link: https://solidsilicon.com
level: platinum
joined: 2024
date: 2024-05-18
draft: false
---

Solid Silicon Corporation is a fabless silicon company developing open source software and secure chip designs based on standardized, sovereign, future-proof silicon, which gives developers the ability to own, control, and trust their computing devices down to the silicon.

@ -7,7 +7,7 @@ tags:
- academic
- openroad
date: 2024-01-25
draft: false
draft: true
---
# OpenROAD and OpenPOWER - Microwatt core for low-power ASIC applications

@ -171,4 +171,4 @@ Worstcase voltage:1.80e+00 V
Average IR Drop : 4.62e-04 V
Worstcase IR Drop: 1.95e-03 V

As a result, it is possible to create highly efficient and effective microwatt processors that can be used in a variety of different devices and applications, from mobile phones to IoT devices and beyond. The combination of the OpenPOWER microwatt processor and the OpenROAD design flow represents a powerful toolset for designers looking to create low-power, high-performance processors for modern electronics.
As a result, it is possible to create highly efficient and effective microwatt processors that can be used in a variety of different devices and applications, from mobile phones to IoT devices and beyond. The combination of the OpenPOWER microwatt processor and the OpenROAD design flow represents a powerful toolset for designers looking to create low-power, high-performance processors for modern electronics.

@ -1,6 +1,6 @@
---
title: Ganesan Narayanasamy
member: ganesannarayansamy
date: 2023-12-04
member: ibm
date: 2022-02-04
draft: false
---

@ -1,7 +1,7 @@
---
title: "Paul Mackerras"
image:
member: paulmackerras
date: 2023-12-06
member: ibm
date: 2021-03-06
draft: false
---

@ -1,11 +1,12 @@
---
title: "Timothy Pearson"
image: "timothypearson-200.jpg"
member: solidsilicon
date: 2024-06-14
member: raptorcomputingsystems
date: 2021-03-03
draft: false
---

Timothy has worked in multiple areas of high performance systems design over the past 15 years,
from hardware / firmware to kernel and application development, with a strong emphasis on open solutions and system security.

In his time at Raptor he has been heavily involved in the inception and creation of the Talos and Blackbird lines of secure,
owner-controlled OpenPOWER machines, along with the FlexVer remote attestation technology.

@ -2,7 +2,7 @@
title: "Instruction Set Architecture"
group: isa
publicreview: false
feedbackprocess:
feedback:
- title: Request For Change Feedback for "non ISA TWG members"
description: "This feedback process uses the RFC method, which we divide in 3 types : _minor changes_, _formal proposal_, or _RFC_."
url: /isarfc/

@ -1,32 +0,0 @@
---
title: PowerVM on POWER Architecture Reference
group: IBM
tags:
- powervm
- hypervisor
- software
- linux
- unix
- operatingsystem
- distribution
- architecture
feedback:
queue: PAPR
date: 2024-10-28
draft: false
---


## Power Architecture Platform Requirements. ##

The purpose of this document is to detail a stable platform architecture to be used by:

- Platforms defined by the POWER ISA Specification that desire to be compatible with operating systems that run on the PowerVM Hypervisor.
- Operating systems that desire to be compatible with running on the PowerVM Hypervisor.

This architecture specification provides a comprehensive computer system platform-to-software interface definition.
It documents minimum system requirements, enabling the development and porting of software to a range of compatible industry-standard computer systems from workstations through servers based on the PowerISA.


This document is maintained by IBM and is made available through the OpenPOWER Foundation to support the work of the OpenPOWER Foundation and open source communities in supporting the POWER platform.
Comments, questions, and suggestions can be submitted through the OpenPOWER Foundation Request Tracker.

@ -3,6 +3,6 @@ members:
- ibm
- vantosh
nextmeeting :
date: 2022-10-24
date: 2022-06-20
time: 15:00


@ -1,9 +0,0 @@
members:
- ibm
- openpowerfoundation
- oregonstateuniversity
- vantosh
nextmeeting :
date: 2024-05-21
time: 21:00

@ -1,5 +1,8 @@
members:
- ibm
- redsemiconductor
- vantosh
- hexintechnologies
nextmeeting :
date: 2022-06-09
time: 07:00


@ -1,9 +1,10 @@
members:
- antmicro
- google
- ibm
- oregonstateuniversity
- vantosh
nextmeeting :
date: 2023-03-09
time: 16:00
date: 2022-06-09
time: 15:00


@ -23,7 +23,3 @@ versions:
date: "2021-09-14"
download: "https://files.openpower.foundation/s/dAYSdGzTfW4j2r2"
description: "Incorporate errata."
- number: "3.1c"
date: "2024-05-26"
download: "https://files.openpower.foundation/s/9izgC5Rogi5Ywmm"
description: "Data cleanup"

@ -1,4 +0,0 @@
versions:
- number: "10.60"
date: 2024-11-04
download: https://files.openpower.foundation/s/XFgfMaqLMD5Bcm8

@ -24,16 +24,16 @@
{{ range $.Site.Pages.ByTitle }}
{{ $level := .Param "level" }}
{{ if eq $level $key }}
{{ $memberstatus := true }}
{{ $cancelled := now.Format "20060102" }}
{{ if isset .Params "cancelled" }}
{{ $cancelled = time (.Param "cancelled") | dateFormat "20060102" }}
{{ if lt $cancelled $now }}
{{ $memberstatus = false }}
<div class="col-lg-{{ $col }} pt-5 pb-0 pb-lg-3">
{{ $memberstatus := true }}
{{ $cancelled := now.Format "20060102" }}
{{ if isset .Params "cancelled" }}
{{ $cancelled = time (.Param "cancelled") | dateFormat "20060102" }}
{{ if lt $cancelled $now }}
{{ $memberstatus = false }}
{{ end }}
{{ end }}
{{ end }}
{{ if eq $memberstatus true }}
<div class="col-lg-{{ $col }} pt-2 pb-0 pb-lg-3">
{{ if eq $memberstatus true }}
<div class="box">
<a href="{{ .RelPermalink }}">
{{ if .Param "image" }}
@ -48,8 +48,8 @@
{{ end }}
{{ $i = add $i 1 }}
</div>
</div>
{{ end }}
{{ end }}
</div>
{{ end }}
{{ end }}
</div>

@ -1,55 +0,0 @@
<script>
var formname = "form.contactForm";
var submiturl = "{{ .Site.Params.forms.contact.URI }}";
{{ if .Site.Params.forms.contact.goal }}
var goal = "{{ .Site.Params.forms.contact.goal }}";
{{ end }}
{{ $feedbackqueue := .Param "feedback.queue" }}
</script>
<section id="contact">
<div class="container"><div class="row wow fadeInUp">
<div class="col-lg-12 col-md-12"><div class="form">
<div id="sendmessage">Your message has been sent. Thank you!</div>
<div id="errormessage">Error</div>
<form role="form" name="contactForm" class="contactForm" id="contactForm" action="" method="post">
<div class="form-row">
<div class="form-group col-lg-12">
<input type="text" name="name" class="form-control" id="name" placeholder="Your Name" data-rule="minlen:4" data-msg="Please enter at least 4 characters" />
<div class="validation"></div>
</div>
</div>
<div class="form-row">
<div class="form-group col-lg-12">
<input type="email" class="form-control" name="email" id="email" placeholder="Your Email" data-rule="email" data-msg="Please enter a valid email address" />
<div class="validation"></div>
</div>
</div>
<div class="form-row">
<div class="form-group col-lg-12">
<input type="text" class="form-control" name="subject" id="subject" placeholder="Subject" data-rule="minlen:4" data-msg="Please enter at least 8 characters" />
<div class="validation"></div>
</div>
</div>
<div class="form-row">
<div class="form-group col-lg-12">
<textarea class="form-control" name="message" rows="5" data-rule="required" data-msg="Please write something for us" placeholder="Message"></textarea>
<div class="validation"></div>
</div>
</div>
<div class="form-row">
<div class="form-group col-lg-12">
By submitting this form, I acknowledge that my information is subject
to the <a href="{{ "/policy/privacy" | relURL }}">OpenPOWER Foundation's Privacy Policy</a>.
</div>
</div>
<div class="form-row">
<div class="form-group col-lg-12 text-center">
<input type="hidden" name="contact" value="{{ $feedbackqueue }}" />
<input type="hidden" name="url" value="{{ $.Page.RelPermalink | absURL }}" />
<button class="btn btn-outline-primary mb-4 mt-4" type="submit" title="Send Message">Send Message</button>
</div>
</div>
</form>
</div></div>
</div></div>
</section>

@ -38,17 +38,14 @@
<div class="col-lg-3"></div>
<div class="col-lg-6 content">
<div><p>{{ .Content }}</p></div>
{{ if .Param "feedbackprocess"}}
{{ range $feedbackprocess := (.Param "feedbackprocess") }}
<a href="{{ $feedbackprocess.url }}"><div class="feedback btn btn-outline-primary">
<h3>{{ $feedbackprocess.title }}</h3>
{{ $feedbackprocess.description | markdownify }}
{{ if .Param "feedback"}}
{{ range $feedback := (.Param "feedback") }}
<a href="{{ $feedback.url }}"><div class="feedback btn btn-outline-primary">
<h3>{{ $feedback.title }}</h3>
{{ $feedback.description | markdownify }}
</div></a><br><br>
{{ end }}
{{ end }}
{{ if .Param "feedback" }}
{{ partial "feedbackform.html" . }}
{{ end }}
</div>
<div class="col-lg-3">
{{ if .Param "group" }}

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