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<?xml version="1.0" encoding="UTF-8"?>
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<!--
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Copyright (c) 2017 OpenPOWER Foundation
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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-->
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<section xmlns="http://docbook.org/ns/docbook"
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xmlns:xi="http://www.w3.org/2001/XInclude"
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xmlns:xlink="http://www.w3.org/1999/xlink"
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version="5.0"
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xml:id="sec_how_findout">
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<title>How did I find this out?</title>
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<para>The next question is where did I get the details above. The GCC
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documentation for <emphasis role="bold"><literal>__builtin_ia32_loadupd</literal></emphasis>
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provides minimal information (the
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builtin name, parameters and return types). Not very informative. </para>
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<para>Looking up the Intel intrinsic description is more informative. You
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can Google the intrinsic name or use the
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<link xlink:href="https://software.intel.com/sites/landingpage/IntrinsicsGuide/">Intel
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Intrinsic guide</link> for this. The Intrinsic Guide is interactive and
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includes Intel (Chip) technology and text based search capabilities. Clicking
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on the intrinsic name opens to a synopsis including; the underlying instruction
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name, text description, operation pseudo code, and in some cases performance
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information (latency and throughput).</para>
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<para>The key is to get a description of the intrinsic (operand fields and
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types, and which fields are updated for the result) and the underlying Intel
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instruction. If the Intrinsic guide is not clear you can look up the
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instruction details in the
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“<link xlink:href="https://software.intel.com/en-us/articles/intel-sdm">Intel® 64 and IA-32
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Architectures Software Developer’s Manual</link>”.</para>
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<para>Information about the PowerISA vector facilities is found in the
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<link xlink:href="https://openpowerfoundation.org/?resource_lib=ibm-power-isa-version-2-07-b">PowerISA Version 2.07B</link> (for POWER8 and
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<link xlink:href="https://www.docdroid.net/tWT7hjD/powerisa-v30.pdf.html">3.0 for
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POWER9</link>) manual, Book I, Chapter 6. Vector Facility and Chapter 7.
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Vector-Scalar Floating-Point Operations. Another good reference is the
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<link xlink:href="https://openpowerfoundation.org/technical/technical-resources/technical-specifications/">OpenPOWER ELF V2 application binary interface</link> (ABI)
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document, Chapter 6. Vector Programming Interfaces and Appendix A. Predefined
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Functions for Vector Programming.</para>
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<para>Another useful document is the original <link xlink:href="http://www.nxp.com/assets/documents/data/en/reference-manuals/ALTIVECPEM.pdf">Altivec Technology Programmers Interface Manual</link>
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with a user friendly structure and many helpful diagrams. But alas the PIM does does not
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cover the recent PowerISA (power7, power8, and power9) enhancements.</para>
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</section>
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