Miscellaneous updates

Signed-off-by: Bill Schmidt <wschmidt@linux.ibm.com>

Intrinsics_Reference/ch_intro.xml

@@ -97,10 +97,6 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_intro">
       the Power SIMD (single-instruction, multiple-data)
       instructions.
     </para>
-    <para revisionflag="added">
-      Write an introductory paragraph about the MMA facility and the
-      ACC registers.
-    </para>
     <section>
       <title>Little-Endian Linux</title>
       <para>

Intrinsics_Reference/ch_mma_reference.xml

@@ -28,10 +28,20 @@
       Specification (see <xref linkend="VIPR.intro.links" />)
       introduced instructions to accelerate matrix multiplication
       computations.  These instructions operate both on the VSRs and
-      on new 512-bit accumulator registers (ACCs).  Intrinsic
+      on eight new 512-bit accumulator registers (ACCs).  Intrinsic
       functions to access these instructions are described in this
       chapter.
     </para>
+    <para>
+      Although the ACCs are treated as separate registers from the
+      VSRs, each <code>ACC[i]</code> may use its associated VSRs
+      <code>4i</code> to <code>4i+3</code> as scratch space.  That is,
+      when <code>ACC[i]</code> contains defined data, the contents of
+      VSRs <code>4i</code> to <code>4i+3</code> are undefined until
+      either an <code>xxmfacc</code> instruction is used to copy the
+      contents of <code>ACC[i]</code> to the VSRs, or some other
+      instruction directly writes to one of these VSRs.
+    </para>
     <para>
       <emphasis role="bold">Review status:</emphasis> This chapter is
       not yet reviewed by anyone.

Intrinsics_Reference/ch_vec_reference.xml

@@ -10613,7 +10613,8 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
       <para>
 	<emphasis role="bold">b</emphasis> must have a value between 1
 	and the number of elements of <emphasis
-	role="bold">a</emphasis>, inclusive.
+	role="bold">a</emphasis>, inclusive, but need not be a literal
+	constant.
       </para>
       <para><emphasis role="bold">Endian considerations:</emphasis>
       The element numbering within a register is left-to-right for
@@ -10684,7 +10685,7 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
 		<para>vector signed char</para>
               </entry>
               <entry align="center" valign="middle">
-		<para>const int</para>
+		<para>unsigned int</para>
               </entry>
               <entry>
 		<programlisting>
@@ -10708,7 +10709,7 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
 		<para>vector unsigned char</para>
               </entry>
               <entry align="center" valign="middle">
-		<para>const int</para>
+		<para>unsigned int</para>
               </entry>
               <entry>
 		<programlisting>
@@ -10751,7 +10752,8 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
       <para>
 	<emphasis role="bold">b</emphasis> must have a value between 1
 	and the number of elements of <emphasis
-	role="bold">a</emphasis>, inclusive.
+	role="bold">a</emphasis>, inclusive, but need not be a literal
+	constant.
       </para>
       <para><emphasis role="bold">Endian considerations:</emphasis>
       The element numbering within a register is left-to-right for
@@ -10822,7 +10824,7 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
 		<para>vector signed char</para>
               </entry>
               <entry align="center" valign="middle">
-		<para>const int</para>
+		<para>unsigned int</para>
               </entry>
               <entry>
 		<programlisting>
@@ -10846,7 +10848,7 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
 		<para>vector unsigned char</para>
               </entry>
               <entry align="center" valign="middle">
-		<para>const int</para>
+		<para>unsigned int</para>
               </entry>
               <entry>
 		<programlisting>