From ac57cca1110ac1d1826e17c79ae1dfe8b7efff1b Mon Sep 17 00:00:00 2001 From: Bill Schmidt Date: Mon, 18 Nov 2019 08:37:45 -0600 Subject: [PATCH] Create revision 1.0.0-prd for public review draft. --- Intrinsics_Reference/bk_main.xml | 40 +++---------------------------- Intrinsics_Reference/ch_intro.xml | 16 ++++++------- Intrinsics_Reference/pom.xml | 8 +++---- 3 files changed, 15 insertions(+), 49 deletions(-) diff --git a/Intrinsics_Reference/bk_main.xml b/Intrinsics_Reference/bk_main.xml index 0571abf..2b6b391 100644 --- a/Intrinsics_Reference/bk_main.xml +++ b/Intrinsics_Reference/bk_main.xml @@ -54,7 +54,7 @@ OpenPOWER Foundation - Revision 0.9.2 + Revision 1.0.0_prd OpenPOWER @@ -88,45 +88,11 @@ - 2019-10-23 + 2019-11-12 - Version 0.9.2: Initial submission to OpenPOWER - Systems Software Workgroup. - - - - - - 2019-10-13 - - - - Version 0.9.1: Initial draft for internal - review. - - - - - - 2018-12-30 - - - - Version 0.9: Completed initial transfer of appendix - information from ELFv2 ABI. - - - - - - 2017-09-25 - - - - Version 0.8: Initial publication to private GitHub - project. + Version 1.0.0_prd: Public Review Draft diff --git a/Intrinsics_Reference/ch_intro.xml b/Intrinsics_Reference/ch_intro.xml index beeaf72..fbe1901 100644 --- a/Intrinsics_Reference/ch_intro.xml +++ b/Intrinsics_Reference/ch_intro.xml @@ -141,14 +141,6 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_intro"> linkend="VR-VSR" />, there are 64 vector-scalar registers; each is 128 bits wide. - - The vector-scalar registers can be addressed with VSX - instructions, for vector and scalar processing of all 64 - registers, or with the "classic" Power floating-point - instructions to refer to a 32-register subset of these, having - 64 bits per register. They can also be addressed with VMX - instructions to refer to a 32-register subset of 128-bit registers. -
Floating-Point Registers as Part of VSRs @@ -167,6 +159,14 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_intro">
+ + The vector-scalar registers can be addressed with VSX + instructions, for vector and scalar processing of all 64 + registers, or with the "classic" Power floating-point + instructions to refer to a 32-register subset of these, having + 64 bits per register. They can also be addressed with VMX + instructions to refer to a 32-register subset of 128-bit registers. +
diff --git a/Intrinsics_Reference/pom.xml b/Intrinsics_Reference/pom.xml index e499713..c6bbdd8 100644 --- a/Intrinsics_Reference/pom.xml +++ b/Intrinsics_Reference/pom.xml @@ -92,9 +92,9 @@ work group and should not be shared with other Foundation members or the public The appropriate starting security for a new document is "workgroupConfidential". --> - workgroupConfidential + - + public - draft - + + review