diff --git a/Intrinsics_Reference/ch_biendian.xml b/Intrinsics_Reference/ch_biendian.xml
index 8c4d76a..b18f13f 100644
--- a/Intrinsics_Reference/ch_biendian.xml
+++ b/Intrinsics_Reference/ch_biendian.xml
@@ -762,369 +762,391 @@ a[3] = c;
endian-sensitive built-in functions can be found in .
-
- Extended Data Movement Functions
-
- The built-in functions in map to Altivec/VMX load and
- store instructions and provide access to the “auto-aligning”
- memory instructions of the VMX ISA where low-order address
- bits are discarded before performing a memory access. These
- instructions load and store data in accordance with the
- program's current endian mode, and do not need to be adapted
- by the compiler to reflect little-endian operation during code
- generation.
-
-
- Before the bi-endian programming model was introduced, the
- vec_lvsl
and vec_lvsr
intrinsics
- were supported. These could be used in conjunction with
- vec_perm
and VMX load and store instructions for
- unaligned access. The vec_lvsl
and
- vec_lvsr
interfaces are deprecated in accordance
- with the interfaces specified here. For compatibility, the
- built-in pseudo sequences published in previous VMX documents
- continue to work with little-endian data layout and the
- little-endian vector layout described in this document.
- However, the use of these sequences in new code is discouraged
- and usually results in worse performance. It is recommended
- that compilers issue a warning when these functions are used
- in little-endian environments.
-
-
- VMX Memory Access Built-In Functions
-
+
+ Endian-Sensitive Built-In Functions
+
-
-
-
+
+
+
-
- Built-in Function
-
+ vec_bperm
-
- Corresponding Power
- Instructions
-
+ vec_mergeh
-
-
- Implementation Notes
-
+
+ vec_signedo
-
-
- vec_ld
+ vec_cipher_be
- lvx
+ vec_mergel
- Hardware works as a function of endian mode.
+ vec_sld
- vec_lde
+ vec_cipherlast_be
- lvebx, lvehx, lvewx
+ vec_mergeo
- Hardware works as a function of endian mode.
+ vec_sldw
- vec_ldl
+ vec_doublee
- lvxl
+ vec_mfvscr
- Hardware works as a function of endian mode.
+ vec_sll
- vec_st
+ vec_doubleh
- stvx
+ vec_mule
- Hardware works as a function of endian mode.
+ vec_slo
- vec_ste
+ vec_doublel
- stvebx, stvehx, stvewx
+ vec_mulo
- Hardware works as a function of endian mode.
+ vec_slv
- vec_stl
+ vec_doubleo
- stvxl
+ vec_ncipher_be
- Hardware works as a function of endian mode.
+ vec_splat
-
-
-
-
- Instead, it is recommended that programmers use the
- vec_xl
and vec_xst
vector built-in
- functions to access unaligned data streams. See the
- descriptions of these instructions in for further description and
- implementation details.
-
-
- Endian-Sensitive Built-In Functions
-
-
-
-
-
- vec_bperm
+ vec_extract
- vec_mergeo
+ vec_ncipherlast_be
- vec_sld
+ vec_srl
- vec_cipher_be
+ vec_extract_fp32_from_shorth
- vec_mfvscr
+ vec_pack
- vec_sldw
+ vec_sro
- vec_cipherlast_be
+ vec_extract_fp32_from_shortl
- vec_mule
+ vec_pack_to_short_fp32
- vec_sll
+ vec_srv
- vec_doublee
+ vec_extract4b
- vec_mulo
+ vec_packpx
- vec_slo
+ vec_sum2s
- vec_doubleh
+ vec_first_match_index
- vec_ncipher_be
+ vec_packs
- vec_slv
+ vec_sums
- vec_doublel
+ vec_first_match_or_eos_index
- vec_ncipherlast_be
+ vec_packsu
- vec_splat
+ vec_unpackh
- vec_doubleo
+ vec_first_mismatch_index
- vec_pack
+ vec_perm
- vec_srl
+ vec_unpackl
- vec_extract
+ vec_first_mismatch_or_eos_index
- vec_pack_to_short_fp32
+ vec_permxor
- vec_sro
+ vec_unsigned2
- vec_extract_fp32_from_shorth
+ vec_float2
- vec_packpx
+ vec_pmsum_be
- vec_srv
+ vec_unsignede
- vec_extract_fp32_from_shortl
+ vec_floate
- vec_packs
+ vec_reve
- vec_sum2s
+ vec_unsignedo
- vec_extract_4b
+ vec_floato
- vec_packsu
+ vec_sbox_be
- vec_sums
+ vec_xl (ISA 2.07 only)
- vec_float2
+ vec_gb
- vec_perm
+ vec_shasigma_be
- vec_unpackh
+ vec_xl_be
- vec_floate
+ vec_insert
- vec_permxor
+ vec_signed2
- vec_unpackl
+ vec_xst (ISA 2.07 only)
- vec_floato
+ vec_insert4b
- vec_pmsum_be
+ vec_signede
- vec_unsigned2
+ vec_xst_be
- vec_gb
+ vec_mergee
- vec_reve
+
- vec_unsignede
+
+
+
+
+
+
+
+ Extended Data Movement Functions
+
+ The built-in functions in map to Altivec/VMX load and
+ store instructions and provide access to the “auto-aligning”
+ memory instructions of the VMX ISA where low-order address
+ bits are discarded before performing a memory access. These
+ instructions load and store data in accordance with the
+ program's current endian mode, and do not need to be adapted
+ by the compiler to reflect little-endian operation during code
+ generation.
+
+
+ Before the bi-endian programming model was introduced, the
+ vec_lvsl
and vec_lvsr
intrinsics
+ were supported. These could be used in conjunction with
+ vec_perm
and VMX load and store instructions for
+ unaligned access. The vec_lvsl
and
+ vec_lvsr
interfaces are deprecated in accordance
+ with the interfaces specified here. For compatibility, the
+ built-in pseudo sequences published in previous VMX documents
+ continue to work with little-endian data layout and the
+ little-endian vector layout described in this document.
+ However, the use of these sequences in new code is discouraged
+ and usually results in worse performance. It is recommended
+ that compilers issue a warning when these functions are used
+ in little-endian environments.
+
+
+ VMX Memory Access Built-In Functions
+
+
+
+
+
+
+
+
+ Built-in Function
+
+
+
+
+ Corresponding Power
+ Instructions
+
+
+
+
+ Implementation Notes
+
+
+
- vec_insert
+ vec_ld
- vec_sbox_be
+ lvx
- vec_unsignedo
+ Hardware works as a function of endian mode.
- vec_insert_4b
+ vec_lde
- vec_shasigma_be
+ lvebx, lvehx, lvewx
- vec_xl (ISA 2.07 only)
+ Hardware works as a function of endian mode.
- vec_mergee
+ vec_ldl
- vec_signed2
+ lvxl
- vec_xl_be
+ Hardware works as a function of endian mode.
- vec_mergeh
+ vec_st
- vec_signede
+ stvx
- vec_xst (ISA 2.07 only)
+ Hardware works as a function of endian mode.
- vec_mergel
+ vec_ste
- vec_signedo
+ stvebx, stvehx, stvewx
- vec_xst_be
+ Hardware works as a function of endian mode.
-
-
+
+
+ vec_stl
+
+
+ stvxl
+
+
+ Hardware works as a function of endian mode.
+
+
+
+
+
+ Instead, it is recommended that programmers use the
+ vec_xl
and vec_xst
vector built-in
+ functions to access unaligned data streams. See the
+ descriptions of these instructions in for further description and
+ implementation details.
+
Big-Endian Vector Layout in Little-Endian Environments
diff --git a/Intrinsics_Reference/ch_vec_reference.xml b/Intrinsics_Reference/ch_vec_reference.xml
index 5a06b7b..a649841 100644
--- a/Intrinsics_Reference/ch_vec_reference.xml
+++ b/Intrinsics_Reference/ch_vec_reference.xml
@@ -13606,7 +13606,8 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
natural element order. If no match, returns the number of
characters as an element count in the vector argument.
Endian considerations:
- None.
+ The element numbering within a register is left-to-right for big-endian
+ targets, and right-to-left for little-endian targets.
@@ -13880,7 +13881,8 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
terminator. If no match or terminator, returns the number of
characters as an element count in the vector argument.
Endian considerations:
- None.
+ The element numbering within a register is left-to-right for big-endian
+ targets, and right-to-left for little-endian targets.
@@ -14221,7 +14223,8 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
natural element order. If no mismatch, returns the number of
characters as an element count in the vector argument.
Endian considerations:
- None.
+ The element numbering within a register is left-to-right for big-endian
+ targets, and right-to-left for little-endian targets.
@@ -14479,7 +14482,8 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
terminator. If no mismatch or terminator, returns the number of
characters as an element count in the vector argument.
Endian considerations:
- None.
+ The element numbering within a register is left-to-right for big-endian
+ targets, and right-to-left for little-endian targets.