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fpu-init
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microwatt/litedram/generated/arty
History
Paul Mackerras ca4eb46aea Make wishbone addresses be in units of doublewords or words 
This makes the 64-bit wishbone buses have the address expressed in
units of doublewords (64 bits), and similarly for the 32-bit buses the
address is in units of words (32 bits).  This is to comply with the
wishbone spec.  Previously the addresses on the wishbone buses were in
units of bytes regardless of the bus data width, which is not correct
and caused problems with interfacing with externally-generated logic.

Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
 		3 years ago
..
litedram-initmem.vhdl Make wishbone addresses be in units of doublewords or words 3 years ago
litedram_core.init litedram: Regenerate from upstream litex 3 years ago
litedram_core.v litedram: Regenerate from upstream litex 3 years ago