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Anton Blanchard 270d7b1b9a Cmod A7-35 support ... This adds support for the Digilane Cmod A7-35. I had to use the MMCM because the clock (12 MHz) is below the PLL minimum of 19 MHz. Signed-off-by: Anton Blanchard <anton@linux.ibm.com>		5 years ago
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LICENSE	Initial import of microwatt	5 years ago
arty_a7-35.xdc	Merge pull request #20 from antonblanchard/reset-rework2	5 years ago
clk_gen_bypass.vhd	Rework SOC reset	5 years ago
clk_gen_mcmm.vhd	Cmod A7-35 support	5 years ago
clk_gen_plle2.vhd	Rework SOC reset	5 years ago
cmod_a7-35.xdc	Cmod A7-35 support	5 years ago
firmware.hex	Add a few more FPGA related files	5 years ago
hello_world.hex	Rebuild hello world assuming a 50MHz clock	5 years ago
nexys-video.xdc	Rename a few reset signals	5 years ago
nexys_a7.xdc	Merge pull request #20 from antonblanchard/reset-rework2	5 years ago
nodivide.patch	Add a few more FPGA related files	5 years ago
pp_fifo.vhd	Initial import of microwatt	5 years ago
pp_soc_memory.vhd	Fix ghdl build error with pp_soc_memory	5 years ago
pp_soc_uart.vhd	Initial import of microwatt	5 years ago
pp_utilities.vhd	Initial import of microwatt	5 years ago
soc_reset.vhdl	Rework SOC reset	5 years ago
soc_reset_tb.vhdl	Rework SOC reset	5 years ago
toplevel.vhd	Rework SOC reset	5 years ago