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b46f81fae4
This adds a debug module off the DMI (debug) bus which can act as a wishbone master to generate read and write cycles. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> |
5 years ago | |
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.. | ||
dependencies.py | 5 years ago | |
hash.py | 5 years ago | |
mw_debug.py | 5 years ago | |
run_test.sh | 5 years ago | |
test_micropython.py | 5 years ago | |
test_micropython_long.py | 5 years ago | |
verific.sh | 5 years ago |