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decrementer
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tests: Adjust header inclusions and Makefile.test
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5 years ago |
illegal
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tests: Adjust header inclusions and Makefile.test
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5 years ago |
privileged
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tests: Add a test for privileged instruction interrupts
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5 years ago |
sc
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tests: Adjust header inclusions and Makefile.test
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5 years ago |
1.bin
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tests: Put an attn instruction at 0x700
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5 years ago |
1.out
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Dump CTR, LR and CR on sim termination, and update our tests
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5 years ago |
2.bin
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tests: Put an attn instruction at 0x700
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3.bin
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tests: Put an attn instruction at 0x700
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4.bin
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tests: Put an attn instruction at 0x700
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5.bin
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tests: Put an attn instruction at 0x700
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6.bin
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tests: Put an attn instruction at 0x700
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7.bin
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tests: Put an attn instruction at 0x700
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8.bin
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tests: Put an attn instruction at 0x700
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8.out
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9.bin
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tests: Put an attn instruction at 0x700
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9.out
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Dump CTR, LR and CR on sim termination, and update our tests
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10.bin
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tests: Put an attn instruction at 0x700
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11.bin
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tests: Put an attn instruction at 0x700
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12.bin
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tests: Put an attn instruction at 0x700
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Dump CTR, LR and CR on sim termination, and update our tests
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13.bin
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tests: Put an attn instruction at 0x700
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13.out
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Dump CTR, LR and CR on sim termination, and update our tests
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14.bin
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tests: Put an attn instruction at 0x700
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14.out
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Dump CTR, LR and CR on sim termination, and update our tests
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15.bin
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tests: Put an attn instruction at 0x700
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15.out
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16.bin
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tests: Put an attn instruction at 0x700
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17.bin
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tests: Put an attn instruction at 0x700
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17.out
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18.bin
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tests: Put an attn instruction at 0x700
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18.out
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19.bin
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tests: Put an attn instruction at 0x700
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5 years ago |
19.out
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20.bin
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tests: Put an attn instruction at 0x700
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20.out
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21.bin
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tests: Put an attn instruction at 0x700
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5 years ago |
21.out
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22.bin
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tests: Put an attn instruction at 0x700
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22.out
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23.bin
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tests: Put an attn instruction at 0x700
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23.out
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24.bin
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tests: Put an attn instruction at 0x700
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25.bin
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tests: Put an attn instruction at 0x700
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25.out
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26.bin
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tests: Put an attn instruction at 0x700
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5 years ago |
26.out
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Dump CTR, LR and CR on sim termination, and update our tests
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27.bin
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tests: Put an attn instruction at 0x700
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5 years ago |
27.out
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28.bin
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tests: Put an attn instruction at 0x700
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28.out
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29.bin
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tests: Put an attn instruction at 0x700
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29.out
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30.bin
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tests: Put an attn instruction at 0x700
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30.out
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31.bin
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tests: Put an attn instruction at 0x700
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31.out
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32.bin
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tests: Put an attn instruction at 0x700
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32.out
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33.bin
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tests: Put an attn instruction at 0x700
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33.out
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34.bin
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tests: Put an attn instruction at 0x700
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34.out
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35.bin
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tests: Put an attn instruction at 0x700
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35.out
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36.bin
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tests: Put an attn instruction at 0x700
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36.out
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37.bin
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tests: Put an attn instruction at 0x700
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37.out
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38.bin
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tests: Put an attn instruction at 0x700
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5 years ago |
38.out
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39.bin
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tests: Put an attn instruction at 0x700
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5 years ago |
39.out
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40.bin
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tests: Put an attn instruction at 0x700
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40.out
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41.bin
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tests: Put an attn instruction at 0x700
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41.out
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42.bin
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tests: Put an attn instruction at 0x700
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5 years ago |
42.out
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5 years ago |
43.bin
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tests: Put an attn instruction at 0x700
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5 years ago |
43.out
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Dump CTR, LR and CR on sim termination, and update our tests
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5 years ago |
44.bin
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tests: Put an attn instruction at 0x700
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5 years ago |
44.out
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5 years ago |
45.bin
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tests: Put an attn instruction at 0x700
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5 years ago |
45.out
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Dump CTR, LR and CR on sim termination, and update our tests
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46.bin
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tests: Put an attn instruction at 0x700
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5 years ago |
46.out
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Dump CTR, LR and CR on sim termination, and update our tests
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5 years ago |
47.bin
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tests: Put an attn instruction at 0x700
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5 years ago |
47.out
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48.bin
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tests: Put an attn instruction at 0x700
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48.out
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49.bin
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tests: Put an attn instruction at 0x700
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49.out
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Dump CTR, LR and CR on sim termination, and update our tests
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50.bin
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tests: Put an attn instruction at 0x700
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50.out
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Dump CTR, LR and CR on sim termination, and update our tests
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51.bin
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tests: Put an attn instruction at 0x700
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51.out
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Dump CTR, LR and CR on sim termination, and update our tests
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52.bin
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tests: Put an attn instruction at 0x700
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52.out
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53.bin
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tests: Put an attn instruction at 0x700
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53.out
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54.bin
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tests: Put an attn instruction at 0x700
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5 years ago |
54.out
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55.bin
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tests: Put an attn instruction at 0x700
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5 years ago |
55.out
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Dump CTR, LR and CR on sim termination, and update our tests
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56.bin
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tests: Put an attn instruction at 0x700
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5 years ago |
56.out
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Dump CTR, LR and CR on sim termination, and update our tests
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5 years ago |
57.bin
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tests: Put an attn instruction at 0x700
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5 years ago |
57.out
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Dump CTR, LR and CR on sim termination, and update our tests
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58.bin
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tests: Put an attn instruction at 0x700
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58.out
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Dump CTR, LR and CR on sim termination, and update our tests
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59.bin
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tests: Put an attn instruction at 0x700
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59.out
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Dump CTR, LR and CR on sim termination, and update our tests
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60.bin
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tests: Put an attn instruction at 0x700
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60.out
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61.bin
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tests: Put an attn instruction at 0x700
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61.out
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62.bin
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tests: Put an attn instruction at 0x700
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62.out
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Dump CTR, LR and CR on sim termination, and update our tests
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63.bin
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tests: Put an attn instruction at 0x700
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63.out
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Dump CTR, LR and CR on sim termination, and update our tests
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64.bin
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tests: Put an attn instruction at 0x700
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5 years ago |
64.out
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65.bin
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tests: Put an attn instruction at 0x700
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65.out
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66.bin
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tests: Put an attn instruction at 0x700
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66.out
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67.bin
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tests: Put an attn instruction at 0x700
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67.out
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68.bin
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tests: Put an attn instruction at 0x700
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68.out
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69.bin
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tests: Put an attn instruction at 0x700
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69.out
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70.bin
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tests: Put an attn instruction at 0x700
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71.bin
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tests: Put an attn instruction at 0x700
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71.out
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72.bin
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tests: Put an attn instruction at 0x700
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72.out
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73.bin
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tests: Put an attn instruction at 0x700
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73.out
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74.bin
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tests: Put an attn instruction at 0x700
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74.out
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75.bin
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tests: Put an attn instruction at 0x700
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75.out
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76.bin
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tests: Put an attn instruction at 0x700
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76.out
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77.bin
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tests: Put an attn instruction at 0x700
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78.bin
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tests: Put an attn instruction at 0x700
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79.bin
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tests: Put an attn instruction at 0x700
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79.out
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80.bin
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tests: Put an attn instruction at 0x700
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80.out
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81.bin
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tests: Put an attn instruction at 0x700
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81.out
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82.bin
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tests: Put an attn instruction at 0x700
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82.out
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83.bin
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tests: Put an attn instruction at 0x700
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83.out
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84.bin
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tests: Put an attn instruction at 0x700
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84.out
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85.bin
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tests: Put an attn instruction at 0x700
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85.out
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86.bin
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86.out
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87.bin
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tests: Put an attn instruction at 0x700
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87.out
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88.bin
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tests: Put an attn instruction at 0x700
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88.out
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89.bin
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89.out
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90.bin
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90.out
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91.bin
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91.out
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92.bin
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tests: Put an attn instruction at 0x700
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92.out
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93.bin
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tests: Put an attn instruction at 0x700
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93.out
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94.bin
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tests: Put an attn instruction at 0x700
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94.out
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95.bin
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tests: Put an attn instruction at 0x700
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95.out
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96.bin
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tests: Put an attn instruction at 0x700
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96.out
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97.bin
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tests: Put an attn instruction at 0x700
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97.out
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98.bin
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98.out
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99.bin
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99.out
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100.bin
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100.out
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101.bin
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101.out
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102.bin
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102.out
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103.bin
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103.out
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104.bin
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104.out
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105.bin
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105.out
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106.bin
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106.out
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107.bin
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107.out
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108.bin
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108.out
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109.bin
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109.out
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110.bin
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110.out
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111.bin
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112.bin
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113.bin
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114.bin
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114.out
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115.bin
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116.bin
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116.out
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117.bin
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117.out
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118.bin
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118.out
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119.bin
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119.out
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120.bin
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120.out
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121.bin
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121.out
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122.bin
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122.out
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123.bin
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123.out
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124.bin
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124.out
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125.bin
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125.out
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126.bin
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126.out
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Dump CTR, LR and CR on sim termination, and update our tests
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tests: Put an attn instruction at 0x700
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tests: Put an attn instruction at 0x700
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tests: Put an attn instruction at 0x700
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Makefile.test
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Change the default cross compiler prefix to powerpc64le-linux-gnu-
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5 years ago |
micropython.bin
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Initial import of microwatt
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test_decrementer.bin
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tests: Update executables
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5 years ago |
test_decrementer.console_out
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Add test cases for new exceptions and supervisor state
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5 years ago |
test_illegal.bin
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tests: Update executables
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5 years ago |
test_illegal.console_out
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Add test cases for new exceptions and supervisor state
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5 years ago |
test_privileged.bin
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tests: Add a test for privileged instruction interrupts
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test_privileged.console_out
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tests: Add a test for privileged instruction interrupts
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test_sc.bin
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tests: Update executables
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5 years ago |
test_sc.console_out
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Add test cases for new exceptions and supervisor state
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5 years ago |
update_console_tests
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tests: Add a test for privileged instruction interrupts
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