microwatt/litedram/gen-src/sdram_init
Benjamin Herrenschmidt 3167515069 sw: Properly mask syscon register fields
Some fields might get extended with extra bits, use the appropriate
masks when reading the values.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
..
include litedram: Add an L2 cache with store queue
libc litedram: Add support for Microwatt-initialized controller
Makefile litedram: Add simulation support
bin2hex.py litedram: Add basic support for LiteX LiteDRAM
head.S soc: Rework interconnect
main.c sw: Properly mask syscon register fields
sdram_init.lds.S soc: Rework interconnect