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microwatt/fpga
Anton Blanchard 0a0ad9b384 Rebuild hello world assuming a 50MHz clock
Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
5 years ago
..
LICENSE
clk_gen_bypass.vhd Add dummy clock generator 5 years ago
clk_gen_plle2.vhd Add and use plle2 primitive for nexys boards 5 years ago
firmware.hex
hello_world.hex Rebuild hello world assuming a 50MHz clock 5 years ago
nexys-video.xdc
nexys_a7.xdc Add constraint file for Nexys A7 5 years ago
nodivide.patch
pp_fifo.vhd
pp_soc_memory.vhd Expose ram init file and memory size through toplevel 5 years ago
pp_soc_reset.vhd
pp_soc_uart.vhd
pp_utilities.vhd
toplevel.vhd Expose ram init file and memory size through toplevel 5 years ago