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fpu-init
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log2ceil-issue
fpu-constant
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microwatt/asic
History
Anton Blanchard ace41e5153 ASIC: Reduce multiplier from 4 to 2 cycles 
Our sky130 gate level multiply/adder now makes timing with a single
register stage.

Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
 		3 years ago
..
behavioural ASIC: Reduce multiplier from 4 to 2 cycles 3 years ago
cache_ram.vhdl
…
main_bram.vhdl Move register stage back after the RAM 3 years ago
microwatt_asic-verilator.cpp
…
multiply.vhdl ASIC: Reduce multiplier from 4 to 2 cycles 3 years ago
register_file.vhdl
…
top-asic.vhdl Add simplebus 3 years ago