matthew1kalasky3
/
microwatt
forked from cores/microwatt
1
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity
548 Commits
31 Branches
0 Tags
65 MiB
master
fpu-init
loadstore-init
core_debug-init
icache-unused-sig
icache-insn-u-state
dcache-unused-sig
unused-sig
divider-init
loadstore-pmu-init
icache-pmu-events
fpu-typo
less-fpga-init
caravel-mpw6-20220530
caravel-mpw5-20220323
caravel-mpw5-20220322
alt-reset-address
log2ceil-issue
fpu-constant
asic-3
boxarty-20211011
icbi-issue
orange-crab-freq
dcache-nc-fix
remove-potato-uart
cache-tlb-parameters-2
caravel-20210114
caravel-20210105
jtag-port-2
jtag-port
nia-debug
Branches Tags
${ item.name }
Create tag ${ searchTerm }
Create branch ${ searchTerm }
from 'fa90f0dbb1'
${ noResults }
Commit Graph

4 Commits (fa90f0dbb1cb706e90cf4e3edaf0bb678a8a6a0e)

Author SHA1 Message Date
Benjamin Herrenschmidt 13e84b0bbb pp_soc_uart: Fix rx synchronizers and ensure stable tx init state 
The rx synchronizers were ... non existent. Someone forgot to add
a if rising_edge(clk) to the process.

For tx, ensure that we have a default value so that TX stays high
from TPGA configuration to the reset being sampled on the first clock
cycle.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
 6 years ago
Anton Blanchard 61d5e61f09 Add a few FFs on the RX input to avoid metastability issues 
Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
 6 years ago
Benjamin Herrenschmidt 559b3bcf2d pp_uart: reformat 
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
 6 years ago
Anton Blanchard 5a29cb4699 Initial import of microwatt 
Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
 6 years ago